Platform FPGAs enhance the programmable logic typically found in FPGAs with DSP engines, embedded processor hard cores, and other specialized features. An example of this is Xilinx’s Virtex-5 FXT family (see Image 1). The Xtreme DSP MAC (multiply-accumulate) engines of the FXT provide the computational horsepower for high performance signal processing applications like radar and SIGINT in a far more SWaP-friendly fashion. In addition, because fabric is not an efficient means for implementation of a robust control processor, the FXT adds up to two 440 PowerPC hard core processors. Capable of running popular real-time operating systems from Green Hills and Wind River, the 440 cores effectively double the device’s GPP performance compared to the Virtex-4 FX. With up to 24 high-speed transceivers capable of running up to 6.5 Gbps, the FXT is especially well suited to I/O intensive applications such as beamforming.

Image 1: Xilinx's Virtex-5 FXT family combines DSP, embedded processing and high speed I/O – a great combination for high performance military applications like radar and SIGINT

New FPGA designs like the FXT provide an opportunity for integrating signal acquisition and processing into a single, compact package suitable for deployment at the sensor. This provides a significant advantage because performing the analog-to-digital conversion, down-conversion and initial signal processing at the sensor maintains an end-to-end digital form of the incoming signal, thus avoiding signal loss or the introduction of noise. This digital form of an intermediate or baseband signal is already proving popular in systems. COTS hardware such as Curtiss-Wright’s XMC-E2201 card (see Image 2), with its compact PMC/XMC form factor, high-speed/high-resolution analog-to-digital converters (ADC), on-board digital down converters (DDC) and serial links to the basecard is an example of a device ideal for this task. When fitted with an FXT FPGA, the XMC-E2201 can capture data, process it, package it, and send it on to later processing stages via PCI, PCI Express, or its high-speed serial links using a number of different protocols, all without direct control from a host processor somewhere in the system.

Image 2: Curtiss-Wright’s XMC-E2201, a rugged and compact high-speed, dual channel 16-bit digital receiver XMC/PMC mezzanine card is based on twin Xilinx Virtex-5 FPGAs, combines input bandwidth in excess of 700 MHz, supports analog sampling rates of 160 Msps, signal-to-noise ratio rated at >77 db, and high spectral purity.

The XMC-E2201 is the leading solution for high SNR acquisition of analog signals in Radar, Software Radio and Signal Intelligence applications. The first of a new generation of digital receivers from Curtiss-Wright, the XMC-E2201 combines high resolution A to D convertors with large capacity Virtex-5 FPGAs to provide a fast development route to digital receiver designs with high dynamic ranges and sophisti ­ cated DSP. This rugged and compact high-speed, dual channel 16-bit digital receiver XMC/PMC mezzanine card supports analog sampling rates of 160 Msps and speeds the integration of high performance signal acquisition into rugged deployed COTS VPX, VME and CompactPCI subsystems. Designed for demanding signal acquisition applications, the card is ideal for use in radar, software defined radio (SDR), and signal intelligence (SIGINT) platforms.

The 16-bit resolution of the A to D convertors provides for class leading performance in both SNR and SFDR. High-speed digitiza ­ tion of up to 160 Msps allows direct sampling of most popular IF frequencies for Radar systems, as well as capturing instantaneous bandwidths of >60MHz; an important feature for communication applications. In addition the high input bandwidth on each channel allows frequencies up 700MHz to be digitized without the need for external down-conversion circuits.

Functional Overview

The heart of the XMC-E2201 design is a twin FPGA architecture designed to support and manage the acquisition of 2 channels of analog input sampling at rates of up to 160 MSPS per channel. Acquisition data is routed to the large DSP FPGA which has up to 16MB of ZBT RAM for interim storage and two (optional) GC4016 Graychips connected as co-processors to supplement its substantial DSP resources. With the aid of a Firmware Development Kit (FDK) available from Curtiss-Wright, some 96% of the Virtex-5 SX95T DSP FPGA is available for user/application specific DSP algorithms to be linked into the XMC-E2201’s data path. On the XMC-E2201 an eight lane PCIe inter ­ connect is routed to the J5 XMC connector form DSP FPGA to facilitate a direct path to transfer data off-board at up to 2.5GB/sec. For inter-board synchronization and custom data interfacing for proprietary buses, the P4 connector is linked directly to the Command & Control FPGA for user I/O.

Rugged Design

The XMC-E2201 has been designed from the outset to operate in challenging environments and the family com ­ prises variants to cope with the full spectrum of ruggedized requirements. Based on twin Xilinx Virtex-5 FPGAs, the XMC-E2201 combines input bandwidth in excess of 700 MHz, industry leading signal-to-noise ratio rated at >77 db, and high spectral purity. This small form factor mezzanine card delivers high dynamic range for sophisticated digital signal processing. Its twin FPGA architecture dedicates one “DSP” Virtex-5 FPGA for high-speed acquisition of the dual analog channel inputs. This FPGA also features 16 MB of ZBT RAM memory and may be optionally configured with dual GC4016 Graychip co-processors to enhance its built-in DSP capabilities. The card’s second “Command & Control” FPGA provides high-speed I/O, including 64-bit/133 MHz PCI-X. An eight-lane PCI Express (PCIe) interconnect provides direct high-speed off-board data throughput rates up to 2.5 GB/sec.

In the near future, Curtiss-Wright plans to introduce variants of the XMC-E2201 that will feature support for expansion via optional high-density Rocket I/O over the card’s J6 connector and higher-speed A/D converters. The board, which currently supports FPGAs rated at 160 Msps is designed to support 180 Msps devices when they become available in the second half of 2008.

• Analog Inputs

o Dual synchronous channels
o 16-bit resolution
o Sample rates up to 160 Msps (180 Msps devices supported when they become available)
o >700MHz input bandwidth (both channels)
o > 77 dB SNR
o > 76 dB SINAD
o Up to 100 dBc SFDR (88 dB typ.)
o 50Ω Input Impedance
o SMC Input Connectors

• Clock Input

o ±1V AC Coupled
o 1 – 160MHz Range
o 0V Threshold
o 50Ω Impedance
o SMC Connector

• Digital Sub-system

o 133 MHz/64-bit PCI-X
o Xilinx Virtex-5 SX User FPGA
o Dual (optional) Graychip 4016 DDCs
o 16 MB ZBT RAM

XMC-E2201 Software Support

To ease the integration and development of signal acquisition applications, the XMC-E2201 is supported with a Firmware Development Kit (FDK) that includes VHDL modules for interfacing the card’s ADCs, DDC, control FPGA and local bus to the user FPGA.Additional software support includes device drivers that are available for VxWorks and Linux operating environments.

May 1, 2008

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