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New EDK 8.1 Simplifies Embedded Design
Platform Studio enhancements streamline processor system development

After achieving an industry milestone, what’s next? In 2005, the Xilinx® Platform Studio tool suite (XPS) included in the Embedded Development Kit (EDK) won the IEC’s DesignVision Award for innovation in embedded design. The revolutionary approach of design wizards brought abstraction and automation to an otherwise manual and error-prone development process for embedded system creation.

The year 2006 brings a new version 8.1 update to the Platform Studio tool suite, with an emphasis on simplifying the development process and providing a more visible environment. The result is a shortened learning curve for new users and an even more complete and easier-to-use environment for existing designers.

Just getting a complex design started can take a significant amount of time out of a critical schedule, so Xilinx started with a premise that the first steps to a working core design should be automated. The Xilinx Base System Builder design wizard within the Platform Studio tool suite provides a step-by-step interface to walk you through the critical first stages of a design. Design wizards are a great innovation because they can provide a quick path to a working core design even if you have minimal expertise. The “smarter” the install wizard is, the fewer issues occur, and the less experience you need to have.

Pre-configured hardware/software development kits are also extremely valuable for getting a design “off the napkin” and into a quick but stable state. Xilinx hardware/software development kits provide working hardware boards, hardware-aware tools, and pre-verified reference designs. The benefit here is that you can power up hardware, download a working design to a board, and start investigating a “working” core system in a very short period of time, skipping past the delays and complexities of debugging new hardware, new firmware, and new software all at the same time.

A majority of the embedded design cycle, before full system verification, is spent iterating on the core design, incrementally introducing new features, adding individual capabilities, and repeatedly debugging after each step. Because this is excessively tedious and time consuming, this stage should be as easy and streamlined as possible. Version 8.1 has a focus on making common (and repetitive) tasks simple and intuitive, benefiting both new and existing users.

All Users Benefit from V8.1

Xilinx has updated the main user interface of Platform Studio to provide an intuitive feel for both hardware and software engineers, making multiple views and customization easy for all. The integrated development environment (IDE) in Figure 1 displays a wide array of information, but also allows you to filter views and customize the toolbars. The left-hand pane provides an industry-standard “tab” method of displaying or hiding information panels on the design “Project,” “Applications,” or “IP Catalog.” Just toggle on the tab of choice to display the contents of that pane.

Figure 1 – New 8.1 Platform Studio GUI

The “Project” tab contains a variety of helpful information about the design, including specific Xilinx device selection and settings (for example, a specific Virtex™-4 or Virtex-II Pro device with one or two PowerPC™ processor cores) and project file locations (hardware and software project descriptions as well as log and report files for steps like synthesis), as well as simulation setup details.

You can view software applications under the “Applications” tab, which provides access to all of the C source and header files that make up the embedded system design. This view also provides views of the compiler options and even the block RAM initialization process.

The “IP Catalog” tab contains in-depth information about the IP cores created, bought, or imported for the design. Xilinx provides several scores of processing IP cores in the Embedded Development Kit software bundle as well as some high-value cores for time-limited evaluations. You can research Xilinx processor IP at www.xilinx.com/ise/embedded/edk_ip.htm.

The middle panel is the “Connectivity” view, and the adjacent panel to the right of that is the associated “System Assembly” view. The connectivity view gives a clear visual of the design busing structure and also provides a dynamic tool for creating new or editing existing connections. The color-coded view quickly makes it clear – even to novice users – the specifics of the bus type and how it might relate to IP. For example, in this view, peripherals connected to the PLB (processor local bus) are presented in orange; OPB (on-chip peripheral bus) connections are green; and point-to-point connections with a processor core, in this case the PowerPC 405, are in purple. The panel “filter” buttons allow you to customize or simplify the connection views so that you can focus on specific bus elements without the distraction of other elements.

Platform Studio reduces the errors that a designer might make by maintaining correct connections by construction – that is, XPS will only display connection options for compatible bus types. This saves debug headaches with tools that allow incompatible connections.

The system assembly view (see Figure 2) more clearly displays an example of dynamic system construction using a “drag-and-drop connectivity instantiation.” In the figure, the gray highlighted “opb_uartlite” IP core is selected on the left panel from the IP Catalog and has been dragged and dropped into the right assembly window, creating a new OPB bus connection option automatically; just mouse-click to connect. The views on the right also provide helpful information such as IP types for perusing and IP version numbers for project version control. Now, at a glance, you can distinguish the system structure without reading reams of documentation.

Figure 2 – System assembly view

However, if design documentation is what your project and team require, Platform Studio 8.1 has the powerful capability to generate full design-reference material, including a full block diagram view of the system elements and their interconnections. This automatic generation of the docs saves valuable time (instead of creating the materials manually) and reduces errors by creating the materials directly from the design. This method keeps the docs and the design accurately in sync as well as displaying a clear high-level view of the entire project.

New Enhancements Help Existing Users

Current Platform Studio users will be pleased to see advances in the support of sophisticated software development, IP support, and the migration or upgrades of older designs. Figure 3 is an example of what the IP Catalog tab might look like for a design, including all IP cores categorically grouped on the left-hand side by logical names. The specific IP cores will display a version number for design control as well as a brief language description if the names are too brief for context. This view allows you to manage your old and current IP as well as future IP upgrades (more powerful versions of cores with more features but often faster and smaller in size).

Figure 3 – XPS IP catalog

Additional information is available as well, such as which processor cores the IP supports. Because Xilinx offers flexible support for both high-performance PowerPC hard and flexible MicroBlaze™ soft-processor cores, it is useful to know which IP cores are dedicated to one processor, the other, or both. In fact, a right mouse-click on the IP from the catalog yields quick access to the IP change history as well as complete PDF datasheets on the specifics. Software drivers for the peripherals have a similar platform settings view for clarity, including version control and embedded OS support.

When a new version of tools and IP becomes available, the upward design migration ought to be as painless as possible. Nobody wants to re-invest design, debugging, and test time to move an older design to a newer set of tools or IP. However, there are often great advantages in new IP/tools that make it advantageous to upgrade. Platform Studio 8.1 has a migration capability (Figure 4) that steps you through a wizard to automate and accelerate the process.

Figure 4 – XPS design migration

XPS 8.1 can browse existing design projects, flag out-of-date projects and IP cores, and then walk you though the process of confirming automated updates to the new IP and project files. The migration wizard updates the project description files and summarizes the migration changes in document form. Minimizing labor-intensive steps means that you can take advantage of new advancements without as much manual re-entering or porting of designs.

Savvy software developers working on more sophisticated code applications will be happy with the enhancements to the XPS Software Development Kit IDE, based on Eclipse. The XPS-SDK has an enhanced toolbar that more logically groups similar functions and buttons while still allowing user customization. Version 8.1 introduces a more powerful C/C++ editor supporting code folding of functions, methods, classes, structures, and macros, as well as new compiler advancements. This new support provides the ability to specify linker scripts and customized compiler options for PowerPC and MicroBlaze processor cores, plus a C++ class creation wizard. Combine this powerful software environment with the innovative performance profiling views and unique XPS capability of integrated hardware/software debuggers, and 8.1 users will be creating better, more powerful embedded systems in less time than ever before.

Conclusion

The award-winning Platform Studio has already streamlined embedded system design. Automated design wizards and pre-configured hardware/software development kits help kick-start designs while reducing errors and tail-chasing.

Now that we have an industry-proven success in ramping-up the “getting started” process, it is time to improve the time-consuming and cyclical nature at the heart of the development process. Create – Debug – Edit – Repeat. Have you ever used a computer-aided tool where most of the steps were intuitive? Where you could guess what a button did before you read the manual or saw a screen in which the contents were all self-evident?

EDK/XPS version 8.1 focuses on ease-of-use improvements across the board, including enhancements to the main user interface, the software development environment (including editing and compiling), the upgrading of IP, the migrating of old projects, documenting designs, viewing and editing bus-based systems, and much more.

By making common tasks simple and intuitive, we can make designing a little bit easier for experienced embedded engineers as well as those brand-new to designing with processors in programmable FPGA platforms. Use the extra time saved during the development process to innovate your own embedded products.

For more information about EDK version 8.1 and all of our embedded processing solutions, visit www.xilinx.com/edk.

by Jay Gould, Product Marketing Manager, Xilinx Embedded Solutions Marketing, Xilinx, Inc., jay.gould@xilinx.com

March 30, 2006

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