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UltraFast, UltraSmall, UltraController-II

Leading the way in programmable innovation for more than 20 years, Xilinx adds to our rich history of breakthrough technologies with the sleek, powerful UltraController-II embedded processing engine. UltraController-II builds on the enormous adoption success of the first generation UltraController reference design released in January, 2004. This latest family member significantly optimizes system resources and enhances performance while providing new embedded capabilities to meet customer demands. All of this is delivered with zero risk, as the pre-configured and pre-verified microcontroller design is available free for the asking.

Based on the industry-standard PowerPC™ processor core immersed in the Virtex™-II Pro and Virtex-4 FX Platform FPGAs, a single UltraController-II reduces area by a stunning one-fifth over the original UltraController design. This ultra-compact design scales clock frequency to over 2X and raw performance to over 3X of the nearest competitor while power is reduced by over 4X compared to competing soft processor implementations. By leveraging both PowerPC cores in the Virtex family of devices, the dual UltraController-II also delivers two pre-configured designs while providing superior power reduction and resource optimization.

At the heart of the design is the 32-bit PowerPC 405 processor utilizing minimal FPGA resources by running code strictly from the integrated PowerPC 405 caches. This innovation eliminates the need for block RAM (BRAM) and has the complementary effect of reducing the controller’s power consumption. In addition, the compact design operates at the maximum frequency of the Virtex-II Pro or Virtex-4 FX devices. That translates to up to 400 MHz for the industry-leading Virtex-II and up to 450 MHz for the breakthrough Virtex-4 FX device.

General-purpose input/output (GPIO) is available directly from the PowerPC 405 core, providing access to 32 bits of input and output. Interrupt exception handling is also provided for a user-defined external interrupt line. Timer resources—including a Programmable Interval Timer (PIT), a Fixed Interval Timer (FIT), and a Watchdog Timer (WDT)—are available for commonly implemented embedded functions. Typical timer functions include time of day computations, data logging for system service routines, periodic servicing of time-sensitive external devices and the ability to monitor systems and aid recovery from upsets by issuing a system reset. Like the original groundbreaking UltraController reference design, system clock interface, reset, boot logic, and a JTAG interface are also pre-configured.

Unleashing Cache-Based Processing

The UltraController-II cache-only approach enables execution at the fastest possible speed for a given processor frequency. Software images must fit and reside in the 16 KB instruction cache and 16 KB data cache of the PowerPC 405. Developing cache-based code is very similar to code that would target the BRAM or external memory. During the software compilation process, the UltraController-II linker script describes the memory address ranges for the compiler to use when associating memory locations for the instructions, data, and other pertinent sections of the executable and linked format (ELF). The ELF file initializes the caches with running machine code. Loading and running cache-based applications are managed through the UltraController-II JTAG port with a simple boot sequence flow.

Simple Steps to Getting Started

To get you started fast, the UltraController-II reference design—along with visual step-by-step quick-start tutorial—is available FREE by visiting the Xilinx website at: www.xilinx.com/ultracontroller. Since the hardware needs to be designed and software applications developed, the Xilinx ISE FPGA tool suite and Embedded Development Kit (EDK), featuring the award winning Xilinx Platform Studio (XPS) design suite, must be installed on the host system. The UltraController-II reference design includes an ISE project for implementing the hardware design and an XPS project for building software applications. The ISE project also consists of a sample top-level design that instantiates and connects the UltraController-II module. Implementation of the ISE project produces a common bitstream for use across multiple software applications and highlights the features of UltraController-II.

After downloading the reference design, the first step is to implement the UltraController-II hardware design with ISE. A few simple steps—unzip, project open in ISE, module selection, and running the program generation—delivers a generated bitstream ready for download. It’s just that simple.

Next, a software application will be built using the Platform Studio embedded tool suite. There are only three steps required here: launch Xilinx Platform Studio, open the UltraController-II project, and “Build All User Applications”. By initiating the build step, three example applications included with the reference design are now ready to execute. It must be noted that as of now, the reference design included is targeted at Virtex-II Pro embedded development platforms.

The final step is to configure the target board with the bitstream created from ISE, then launch the code. Again, a few simple steps get the application launched. Assuming the JTAG connection is made between the host and target board, launching ISE’s Configure Device (iMPACT) command downloads the bitstream to the target board. That’s it! Now you’re ready to run. Included examples and application notes provide ideas and step-by-step procedures for software changes or updates with XPS.

Flexibility Runs in the Family

The UltraController-II is just the latest in our robust and growing family of embedded solution offerings. Xilinx understands that one processor offering or architecture can’t fit all needs. That’s why we offer a range of solutions that deliver the flexibility to trade off performance, feature set, cost, compatibility, and optimization as your requirements demand. The Xilinx embedded portfolio enables the combination of traditional processor architectures with customer-driven custom peripheral functions. The functions can be easily implemented or changed and are supplied by Xilinx in the form of our pre-verified Intellectual Property (IP) cores or developed by the user.

To make this simple, the Xilinx unified design environment enables the ease of embedded system development throughout the platform design cycle. With the award-winning Xilinx Platform Studio embedded tool suite and rich ecosystem of best-in-class companies support, you can be sure that you’re getting the industry-leading performance you’ve come to expect from Xilinx.

Take the first step to more innovative embedded processing solutions. Download UltraController-II for free today and kick start your embedded product development.

February 24, 2005

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