FPGAs have emerged as a critical component in many of today’s most demanding embedded system designs. Through a combination of unit costs dropping dramatically and the ease and flexibility they afford the designer, it is no surprise to see their adoption in embedded designs for products shipping into today’s hyper-competitive global markets. By establishing market presence, shaping customer preferences, attaining loyalty, building brand equity and of course achieving high profits, being first to market is critical to driving the success of most businesses. So how do you get your next great idea to market first, how do you control costs to make money once there and how do you protect your revenue stream and brand once your product is shipping in volume?

Getting to market first

Seeking excellence in all aspects of organization management, planning, development, manufacturing and marketing should help in achieving the ultimate goal of getting to market first, but from system design perspective, simplifying design through eliminating components is an important and all too often overlooked aspect of getting a design out the door. Many designers think that focusing on unit cost of FPGA-based solutions will give them the lowest total system cost and the quickest time to market, only to find that a vast array of complex and time consuming support infrastructure is required in their design to support their chosen device. In the low-cost (value-based) FPGA market there are several different technology choices available to the embedded system designer and the choice of FPGA technology makes a significant difference to the complexity of the embedded system design implementation and the overall time to design completion.

The fundamental difference in FPGA choices center around using a nonvolatile reprogrammable flash technology or a volatile SRAM based technology FPGA. The single chip and live at power-up (LAPU) capabilities of flash-based FPGAs dramatically simplifies the system level design and integration into the final product. Flash-based FPGAs do not require configuration loading at power-up or brown-out detection strategies in power glitch situations. No need to load the FPGA from the MCU at power-on and no additional power management circuitry to source, layout, debug and test. In addition by being LAPU flash-based FPGAs phase locked loops (PLLs) are instantly available for clock generation as are core logic and I/Os to control signals during power up. The LAPU features of flash based FPGAs provide for predictable and stable system start-up allowing designers to focus on testing and validation of the design and not integration problems and debug issues.

Controlling costs

Lowest total system cost is the major concept organizations thrive to achieve in order to reduce the overall cost of the project for the company, maximize profit and increase market share. When designing an FPGA, designers should not regard the unit price tag as the only component contributing to total system cost. Other hidden costs, which are often ignored, can contribute significantly to total system cost. The lack of LAPU capability can add several unnecessary components such as a CPLD for supervision tasks and bus maintenance, clock generator and reset controller, as the PLL and chip-enable signals are not available to help in system setup. For flash-based FPGAs lower bill-of-material costs through the use of fewer components is just the start of the cost savings. Lower printed circuit board cost (PCB) as board area is reduced, product reliability and yield increases and lower power consumption that allows for a cheaper power supply and no forced cooling techniques all contribute to cost reduction. Every embedded system has different requirements and not every system will benefit from the elimination of all these components, but in general the cost savings of a nonvolatile FPGA in your next embedded systems design may be the best decision you can make to lower the total bill-of-material costs.

Beyond bill-of-material costs of components, PCB and assembly there are also significant and often intangible costs associated with validation, verification and qualification of additional unnecessary components. This results in development schedule delays and design engineering overhead, which kill productivity through inefficient use of resources.

Finally, certain product attributes should be considered in the design stage with operations and manufacturing to lead to maximized manufacturing efficiency. Choosing a nonvolatile FPGA solution may reduce operations costs through simpler testing and easier product qualification, enhancing product yield, reduced risk, reduced EMI, reduce suppliers and lower inventories.

Protecting your investment

There are additional issues when designing FPGAs in embedded systems, whose effects cannot be measured by time or cost, but their influence on the company’s overall business can be devastating. Issues of design security, product defamation protection and product liability reduction can be directly influenced by the FPGA technology used for the embedded system.

Globalization has brought tremendous benefits to the electronics industry but it also brought some downfalls. Information can be rapidly retrieved and designs can be altered, ‘over-built’ or cloned using variety of techniques, resulting with an imitation or ripped-off product in the market in few weeks. Design security becomes more important for the company’s current and future business, reputation, brand equity, support burden and protection from product liability and litigation. There are many risks to the design and IP throughout the supply chain from manufacturers, professional design hackers and sometimes users. No longer are systems protected by ASICs, when FPGAs have displaced them at the heart of the system. FPGA technology choices can have a big impact on exposure to these issues and patents and litigation are hardly the way to enforce IP theft. Enforcement of patents is cost prohibitive in most cases, uncertain in its outcome and the lack of international standards makes the process difficult and time consuming. By the time you have won the legal ‘battle’ you usually will have lost the business ‘war’.

An FPGA device that has its configuration bit stream exposed on each power-up cycle is hazardous to the health of the design and company’s overall business. It is easy to intercept and capture the device configuration downloaded from external PROM or processor and clone the design in a very short time. The design can be taken by the contract manufacturer or ‘hackers’ to program blank standard product FPGA devices to over-build additional systems and sell them on the ‘gray’ market. The design can also be cloned, again resulting with business damages to the original company, which designed the product and invested money and effort in developing its IP.

FPGAs based on nonvolatile flash provide a good solution for these concerns as the configuration bit stream is programmed into the device itself and cannot be intercepted. These FPGAs are highly resistant to invasive attacks, de-capping and stripping only reveals the structure of the device and not the actual contents of the nonvolatile memory cell. Furthermore, the latest flash FPGA solutions have an integrated AES decryption core that allows secure in-field reprogrammability as well as over-building protection.

Total cost-of-ownership is directly influenced by embedded system designers’ practices especially when FPGA technology choices are considered. Keeping in mind the cost associated with the bill-of-material, design and operations effectiveness and implications associated with the product in the field, such as product liability and security. Nonvolatile flash-based FPGAs provide an alternative solution with unique differentiators to SRAM-based FPGAs and may be the best choice for your next embedded system design.

by Hezi Saar – Actel Corp.

February 24, 2005

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