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Welcome to the Journal Spotlights embedded design edition. This time, we bring you five interesting papers from leading companies on addressing common challenges for embedded systems designers. Xilinx starts things off explaining how we can develop a full-blown Linux-based embedded system on a single FPGA. Actel follows with a paper on low-power design with low-cost programmable devices. Next Lattice fills us in on their open-source Mico32 embedded processor architecture. After that, Datalight explains the convergence of NAND and NOR flash technologies, and finally Altium tackles the common problem of synchronizing the pinouts between your FPGA design and your board design.
We hope you enjoy this supplement to FPGA Journal, Embedded Technology Journal, and IC Design and Verification Journal.
Kevin Morris – Editor-in-Chief
Techfocus Media, Inc.
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CONTENTS
Meeting Embedded System Challenges
with Linux and
Low-Cost FPGAs
Xilinx, Inc.
The New "Power-Smart"
Power Paradigm
Actel Corporation
Open and Easy Microprocessor
Designs Using the LatticeMico32
Lattice Semiconductor Corporation
NAND and NOR Convergence Datalight
FPGA/PCB Pin Synchronization
Altium, Ltd.
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Introduction
Embedded system needs are as diverse as their applications. But as system architects are called upon to build more intelligent, connected devices in less time, there are two challenges that are a given:
- Growing software content in embedded systems
- Rapidly changing hardware system requirements
One way to manage growing software content is to leverage commercial or open source operating systems (OS) like Linux as a common embedded software platform. Linux not only provides a robust, standards-based OS that works on a range of embedded devices, but also an open platform with a large ecosystem of middleware providers. Using pre-tested implementations of standard networking and application level protocols can significantly save development time, allowing developers to focus on differentiating their applications.
With the availability of FPGA-based processing solutions like the MicroBlaze processor with optional Memory Management Unit (MMU) capabilities, it is now possible to use a common software platform like Linux while still adapting the underlying hardware rapidly to meet changing requirements. [more]
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Abstract
The next few years will bring great changes in the way our society views the high-tech community. We're in the early stages of a transition that will result in recognition of the electronics industry as a major contributor to the resolution of the world's global warming problems. To date, companies are talking about power reduction initiatives, but more can be done. From the design of "power-smart" chips and systems to the development of industry-wide power efficiency guidelines, the new power paradigm calls for the electronics industry to take responsibility for reducing energy consumption, improving power efficiency and ultimately, reducing greenhouse gasses.
"Power" in a Changing World
In the 1990s, "power" was discussed in relation to supplying power to a system or providing volts and amps to a PC card. And, for most people, "low power" was about a few power-conscious products that looked good on paper, but often saw little success.
Power in semiconductor devices takes two basic forms: static and dynamic. Static power is consumed when the part is not doing any useful work, while dynamic power is consumed when the device is actively working. Until recently, dynamic power was the dominant source of power consumption. [more]
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Embedded Microprocessor Trends and Challenges
The last few years have witnessed a growing trend to use embedded microprocessors
in FPGA designs. Figure 1 illustrates this trend.
As illustrated in the graph, this trend is not showing any signs of slowing down. Three important benefits of the embedded microprocessor approach are driving this trend. The first is that a soft processor provides the preferred way to implement control-plane functionality in an FPGA while leaving the datapath functionality to the programmable
hardware. Control plane functionality that can be implemented in software rather than hardware allows the designer much greater freedom to make changes. Also, many control plane functions are just too difficult to reasonably implement in hardware. The second benefit is that, with software-based processing, it is possible for the hardware
logic to remain stable because functional upgrades can be made through software modification. The third benefit is that FPGA embedded soft processors will not become obsolete. One of the risks that any user faces when designing with an off-the-shelf microprocessor is obsolescence. Having to deal with supply issues or last time buy orders can become a concern. Also, moving to a new microprocessor entails the task of implementing an incompatible instruction set. Considering the length of some product life cycles, redesigning to support a new microprocessor or simply re-writing and porting older code can be challenging, costly and time consuming. [more]
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NAND and NOR technologies each have distinct advantages for developers and end customers and there is a growing trend toward designing systems capable of converging these technologies. Many existing designs deploy both NAND and NOR arrays. Technologies such as Samsung OneNAND ™ and Spansion OrNAND ™ seek to offer the benefits of NOR and NAND within a single solution, while integrated NAND controllers simplify system design. This paper will examine the flash technologies, NAND and NOR, their advantages and disadvantages, then look at how these technologies are converging.
NAND vs. NOR Cell Organization
Following are illustrations of a typical NOR cell organization (left) compared to a typical NAND cell organization (right). NOR allows for individual access to each cell, whereas NAND accesses each cell through adjacent cells. [more]
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Pin and part swapping has long been one of the many techniques that electronics designers exploit to decrease PCB routing complexity and remain competitive. But the accelerated adoption of FPGAs due to their increased affordability and ever-improving performance has placed new pressures on traditional PCB design flows.
Yesterday's task of exchanging a few gates within an IC package or the connections to a couple of resistor arrays is quite different from today's task of managing several hundred pin swaps across one or more FPGA devices, and then synchronizing those changes with the FPGA design. As the design progresses through multiple iterations, the task of synchronizing the data and pins across the PCB and FPGA domains has become a full-time job in itself and the blessing of pin swapping has become a curse.
So, designers need to overcome this increasing synchronization complexity so that they can continue to exploit the benefits of programmable hardware. [more]
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