FROM
THE EDITOR
This week, we examine the programmable panacea, the golden hammer, the silver bullet of electronic engineering technology. Of course, we’re talking about the device that can end world hunger, create a lasting peace, and allow us to quietly fix our engineering boo-boos even after the customer is using our product in the field. The FPGA is certainly one of the most well-hyped technologies ever. In our intelligent rejection of marketing misrepresentation, however, we may be missing the quiet truths behind the scene. Our latest feature takes a look.
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Kevin Morris – Editor in Chief
Techfocus Media, Inc.
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EVENTS & ANNOUNCEMENTS
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Xilinx Virtex®-5 FPGA Development kit for PCIe®
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Powering FPGA-Based Systems … Simply
DC/DC µModule™ regulators are complete system-in-package power supplies, ready to power your FPGA-based systems. These powerful DC/DC circuits include the inductor and MOSFETs and are simplified to resemble an IC. From low to high power, these DC/DC µModule systems are backed by Linear Technology’s rigorous testing.  Click here for more
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High Efficiency Power Supply Design for FPGA-Based Systems.
Performance of FPGA-based systems depends on the electrical and thermal performance of DC/DC regulators. A properly packaged power management device improves regulation accuracy and stability while removing heat quickly. DC/DC µModule™ regulators from Linear Technology are complete system-in-package power supplies in an IC form-factor with optimum layout and very low thermal impedance.  Click here for more
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Golden Hammer
Pursuit of the Programmable Panacea (Kevin Morris)
The countdown counter/timer circuit was pretty trivial to code up in VHDL. My dev board had an old FPGA on it, but it didn’t matter. The original version of my little design probably used less than 10% of the chip anyway. I’d enhanced it several times, of course. The original one loaded a big number into the register and then counted down. When the countdown reached zero, an audio-frequency square wave was generated at an output pin. A little amplifier circuit took the digital signal and ran it straight to a small speaker producing the desired effect – a buzzy tone that was clearly audible.
Version two had a bit more capability. I keyed a button on the development board to first stop the buzzing tone, then load a new (much smaller) value into the countdown register and start the countdown again. Now, there were two controls – the master reset that configured the FPGA and started the big countdown and the new control that stopped the buzz and re-started the delay timer with a smaller value. I also figured out that I could run the counter at audio frequencies and simply use the clock signal as the tone generator when the count reached zero. Slowing down the clock also allowed the use of a smaller countdown register to reach my target delay – about eight hours.
When you have programmable hardware, feature creep with the device already deployed in the field is not only an engineering risk, it’s a moral imperative. When I was watching a demo of an MP3 player built on an FPGA demo board, I knew my design had to be updated. Now, the countdown timer would reach zero, and the MP3 demo design would be triggered to start playing music through the speaker. No more waking up to the dreaded square wave buzz… One more tweak to allow my MP3 of choice to be read from the removable SD card on the demo board, and my FPGA-based alarm clock was complete. Now, I could hit the button when I went to sleep, and, eight hours later, my favorite MP3 track would burst forth from the speaker. If I wasn’t ready to rise, I hit button number two and got a 15 minute snooze. [more]
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