a techfocus media publication :: April 1, 2008 :: volume XIX, no. 01

FROM THE EDITOR

This week, Xilinx hits us with a duo of announcements – first, a new family from the Virtex-5 generation “Virtex-5 FXT,” and second, a new release of the company’s ISE software tool suite.  Our latest feature article examines the new offerings.

Next, we celebrate the season with the announcement of a unique new technology from none other than our own Bryon Moyer.  Bryon’s new patent-pending solution promises to help you snag the technical information you need without falling victim to the perils of marketing run amok.  Our patent application is submitted for your approval.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at:
comments@fpgajournal.com. If you'd rather sound off in public, please post your comments or questions in our new Journal Forums.

Kevin Morris – Editor in Chief
Techfocus Media, Inc.

EVENTS & ANNOUNCEMENTS

Deliver sustainable differentiation with Altium's Innovation Station.  When Altium Designer combines with Altium’s re-configurable hardware development platforms, the boundaries between software and hardware development dissolve to create the ultimate Innovation Station. From pure device intelligence with no electronics hardware design, to full custom electronics hardware, with or without the design of intelligent elements, designers can pick and choose whatever implementation configuration they want. 
See, touch, play at ESC 08


Xilinx Virtex®-5 FPGA Development kit for PCIe®
Cut design time, power and cost with built-in PCIe block.
Get started now with this PCI-SIG compliant solution from Xilinx.
Buy kit


Powering FPGA-Based Systems … Simply
DC
/DC µModuleTM regulators are complete system-in-package power supplies, ready to power your FPGA-based systems. These powerful DC/DC circuits include the inductor and MOSFETs and are simplified to resemble an IC. From low to high power, these DC/DC µModule systems are backed by Linear Technology’s rigorous testing.
Click here for more


High Efficiency Power Supply Design for FPGA-Based Systems. Performance of FPGA-based systems depends on the electrical and thermal performance of DC/DC regulators. A properly packaged power management device improves regulation accuracy and stability while removing heat quickly. DC/DC µModuleTM regulators from Linear Technology are complete system-in-package power supplies in an IC form-factor with optimum layout and very low thermal impedance.
Click here for more


Mixed-Signal ASICs from ChipX

  1. USB 2.0 & PCI Express ASIC Designs and FPGA conversion
  2. USB-IF & PCI-SIG certified ASICs
  3. Standard Cell, Hybrid ASIC and Structured ASIC solutions
  4. Low NRE, fast Time to Market, USB & PCIe ASIC platforms

Win a PCIe Development Board click here


Understanding the cost and time restraints of the industry, PDI provides the perfect low maintenance out source solution for the production and shipping of your training manuals globally. Through on-line ordering, version control, global coverage with localized production, efficiencies will be gained and costs controlled.

Find out more at www.pdi-europe.com


CURRENT FEATURE ARTICLES

Tools and Transceivers
Dual Xilinx Announcements
(Kevin Morris)
Methods for Reducing Marketing Jitter Through Filtering of Marketing Noise in Conference Presentations
(Bryon Moyer)

Synthesis Flows Back to the Sea
Synopsys Buys Synplicity (Kevin Morris)
Maximizing Your Millimeters2
Actel Expands Low Power Line
Comparing Power Consumption of FPGAs with  Customizable Microcontrollers
by Koji Gardiner, Stanford University
Making FPGAs Cool Again – Part 2
How Tools Unlock the Hardware Power Capabilities
(Bryon Moyer)


JOURNAL WEBCASTS

NEW!! CHALK TALK Low Cost FPGA with Serdes Lattice ECP2M. Amelia Dalton talks with Bertrand Leigh of Lattice Semiconductor about low-cost FPGAs with multi-gigabit SerDes interface capability. (Lattice Semiconductor)

CHALK TALK Crossing the Gap between Algorithm and Hardware Implementation. Join Amelia Dalton as she learns how C++ and Catapult C Synthesis can accelerate the design, implementation, and verification of complex system-level algorithms. (Mentor Graphics)

Approaching Yield in the Nanometer Age-DFM Methodology. As we dive deeper into the nanometer era, we must rethink the way we design. Tools, techniques, and methods that once worked without fail cannot hold up at the 65 and 45 nm depths, making it more challenging than ever to achieve yield. This tutorial explores these challenges within both the business and historical context of the IC design and manufacturing process. (Mentor Graphics)

CHALK TALK CES 2008. Did you miss CES? Amelia Dalton didn't! Watch Journal Webcasts coverage of the event now!

CHALK TALK Meeting The Challenges of FPGA Design With Synplify Premier. Join Amelia Dalton as she investigates several new design technologies that address the top challenges faced by FPGA designers today. (Synplicity)

CHALK TALK
Accelerate SoC and ASIC Verification Using FPGA Prototypes. Join Amelia Dalton as she explores methods of ASIC verification available today and why FPGA-based prototypes offer the most affordable and most powerful solution. (Synplicity)

[click here for more webcasts]


Tools and Transceivers
Dual Xilinx Announcements
(Kevin Morris)

In the old days, we had only two kinds of FPGA – small and smaller, also known as slow and slower, or hot and hotter...  The technology was useful for a few high-value applications, but it was limited on all three fronts – density (cost), speed, and power -- from attacking a much broader market.  As we waltzed along the to the three-count meter of Moore’s Law, all three critical parameters improved.  Density went up, frequency got faster, power cooled down, and people got happier.

After a few rounds, however, FPGAs had pretty well saturated the bigger, faster, cooler crowd.  In order to reach a broader audience now, we needed to teach our favorite semiconductors some new tricks.  For the DSP people, we designed hardened high-speed multipliers.  For connectivity hogs, we grafted on multi-gigabit serial transceivers.  For embedded designers, we dropped in a processor core or two – and all of those people needed big blocks of memory to make effective use of the new features.

The addition of all those features, however, gave us the FPGA that was something akin to a semiconductor Swiss Army Knife.  It had the features required to do just about any job you could name.  Unfortunately, almost no project required all the features, so you ended up buying (and powering) a bunch of extra features that you didn’t need.  Ever use the toothpick feature on your pocketknife?  Nope.  Me neither. [more]


Methods for Reducing Marketing Jitter Through Filtering of Marketing Noise in Conference Presentations

(Bryon Moyer)

Related Applications
None

Field of the Invention
Way out in left field.

Background of the Invention
For purposes of gathering together for reasons including but not limited to sharing information, making commercial announcements, receiving training, professional networking, escaping a nagging spouse or children, and racking up frequent flier miles, it is common for engineering professionals to attend conferences or conventions. Such conferences may consist of convention-center catered meals, speeches in which very important people say what everyone already knows, an exhibit hall wherein more women are employed than in the remaining entirety of the technology industry, and various panels and presentations intended to provide information from presenter to audience.

For most such conferences, the tone of the panels and presentations may be expected to be professional and technical, with minimal intrusion by commercial considerations. In the course of assembling such panels and inviting speakers to prepare presentations, it may occur that the technical information being communicated experiences high levels of marketing noise injection. This creates reluctance by engineers to attend such highly noisy presentations, a phenomenon referred to as marketing jitter. [more]



Visit Techfocus Media


You're receiving this newsletter because you subscribed at our web site www.fpgajournal.com.
If someone forwarded this newsletter to you and you'd like to receive your own free subscription, go to: www.fpgajournal.com/update.
If at any time, you would like to unsubscribe, click here. (But we hope you don't.)
If you have any questions or comments, send them to comments@fpgajournal.com.

All material copyright © 2003-2008 techfocus media, inc. All rights reserved.
Privacy Statement