CURRENT FEATURE ARTICLES

Actel Powers Down – Again
New ProASIC3L Family
Spreading the Span
ChipX Rolls Hybrid ASIC
Auld Langxiety
Bracing for 2008
New Approach to FPGA Physical Synthesis for Ease-of-Use and Wide Device Support
by Daniel Platzker and Jaggi Balasubramanian, Mentor Graphics
Zeroing in on Power
Altera Announces Max IIZ
Using CPLDs to Replace or Augment Microcontrollers
by James Adams, Altera Corporation

JOURNAL WEBCASTS

NEW!! CHALK TALK Accelerate SoC and ASIC Verification Using FPGA Prototypes - Join Amelia Dalton as she explores methods of ASIC verification available today and why FPGA-based prototypes offer the most affordable and most powerful solution. (Synplicity)

CHALK TALK Advancing SoC Verification Methods – Join Amelia Dalton as she talks with experts from Mentor Graphics on processor-driven test and other techniques for solving your system-on-chip verification problems. (Mentor Graphics)

CHALK TALK Real World Solutions for FPGAs in Ultra Low Power Applications - Join Amelia Dalton as she examines the Low Power Reference Platform from Arrow, Altera, and Linear Technology - proving that FPGAs really can run on batteries. (Altera, Arrow, Linear)

CHALK TALK Did you miss the ARM Developers' Conference?  Join Amelia Dalton for Journal Webcasts' coverage of the event - it'll be just like you were there! (Journal Webcasts)

Xilinx Virtex-5 Power Optimization & Power Design Guidelines (Xilinx)

Virtex-5 FPGAs and PlanAhead Deliver Maximum Performance (Xilinx)

Accelerate Delivery of Built-in Ethernet Solutions Using ilinx FPGAs and Gigabit Ethernet Development Kit (Xilinx)

Discover How to Design With and Take Advantage of the PCI Express Hard Block in the Virtex-5 FPGA (Xilinx)

Discover How the Complete Virtex-5 PCI Express Solution Reduces Risks for Your Application (Xilinx)

An Introduction to the Xilinx Virtex-5 FPGA Family (Xilinx)

Addressing Size, Weight, and Power Constraints (Altera)

Enable High-Volume Applications with New Low-Cost FPGAs (Altera)

Implement PCIe, GbE & SRIO with Altera's Low-Cost FPGAs (Altera)

Actel Powers Down – Again
New ProASIC3L Family

For a long time, the messages coming out of Actel were diverse – their two flavors of non-volatile programmable logic devices, some flash-based and others antifuse-based, had distinctive characteristics that differentiated them from mainstream SRAM-based FPGAs.  They tended to have better resistance to radiation and better design security, they were live at power-up, they were a true single-chip solution because they didn’t require configuration circuitry to support them…

Today, that’s all changed.  There is only one marketing word coming out of Actel these days, and it’s Power - less of it.  Actel has focused their development efforts, their messaging, and their minds on low-power programmable logic, and the other subtle differences have fallen by the wayside. 

Now, they’re fleshing out their low-power offerings with a new flash-based family - ProASIC3L - that fits in between their ProASIC3 family and the ultra-low-power Igloo family.  Igloo remains the no-holds-barred-microwatt-miser, and ProASIC3 is still the as-close-to-SRAM-speed-as-flash-can-get family.  ProASIC3L gives up a little bit of the speed of ProASIC3 in order to gain a lot of the power savings of Igloo.  [more]