CURRENT FEATURE ARTICLES

Spreading the Span
ChipX Rolls Hybrid ASIC
Auld Langxiety
Bracing for 2008
New Approach to FPGA Physical Synthesis for Ease-of-Use and Wide Device Support
by Daniel Platzker and Jaggi Balasubramanian, Mentor Graphics
Zeroing in on Power
Altera Announces Max IIZ
Using CPLDs to Replace or Augment Microcontrollers
by James Adams, Altera Corporation
Legacy of Languages
Culture in Code

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CHALK TALK Real World Solutions for FPGAs in Ultra Low Power Applications - Join Amelia Dalton as she examines the Low Power Reference Platform from Arrow, Altera, and Linear Technology - proving that FPGAs really can run on batteries. (Altera, Arrow, Linear)

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Xilinx Virtex-5 Power Optimization & Power Design Guidelines (Xilinx)

Virtex-5 FPGAs and PlanAhead Deliver Maximum Performance (Xilinx)

Accelerate Delivery of Built-in Ethernet Solutions Using ilinx FPGAs and Gigabit Ethernet Development Kit (Xilinx)

Discover How to Design With and Take Advantage of the PCI Express Hard Block in the Virtex-5 FPGA (Xilinx)

Discover How the Complete Virtex-5 PCI Express Solution Reduces Risks for Your Application (Xilinx)

An Introduction to the Xilinx Virtex-5 FPGA Family (Xilinx)

Addressing Size, Weight, and Power Constraints (Altera)

Enable High-Volume Applications with New Low-Cost FPGAs (Altera)

Implement PCIe, GbE & SRIO with Altera's Low-Cost FPGAs (Altera)

Spreading the Span
ChipX Rolls Hybrid ASIC

ChipX has long spanned the gap between FPGA and ASIC.  Their range of products includes everything from structured ASIC through standard cell, and they’re often called into service when FPGAs can’t cut the mustard because of cost, power, or performance, but a full-blown minimum-geometry ASIC project is beyond the means of the project. 

Now, they’re rolling out something they call “Hybrid ASICs” to make their span even more continuous.  Before we get into specifics, let’s have a brief review of terminology.  FPGAs are standard semiconductor products.  FPGA companies build and inventory devices, and all of your customization is done after the device is completed.  One step up the custom ladder from there are the (almost) defunct gate arrays.  These devices are pre-built with a sea of unconnected gates, and they are customized by adding only the last few layers of metal that define the interconnect between the gates.

One notch more advanced than gate arrays (we’d still call ‘em gate arrays if we could get away with it) are gate arrays with more complex hard-wired IP blocks also built into the fabric.  These devices are known as “structured ASICs” (although vendors are now steering away from that label because the title has earned somewhat of a black eye in the market.)  Now, instead of having to build those multipliers out of discrete gates, you can just hook up to an already-optimized one lying there in wait.  These devices are also customized by adding just the last few layers of metal. 

There’s still quite a gap between structured ASIC and Standard Cell, however, and ChipX has now bridged that gap with two distinct technologies.  The first of these, which we wrote about almost a year ago, were their “Embedded Arrays” – devices with a mixture of standard cells for performance and structured ASIC fabric for customizability.  Now, the new hybrid ASIC slides in between embedded arrays and full-blown standard cell designs.

Think of hybrid ASIC as a roll-your-own platform chip.  You build most of your design (the part that won’t be changing often) using standard cell technologies.  This part of your design might contain things like processor cores, memory, peripherals, and some I/O.  Yes, it can even include analog (calm down, we won’t mention it again).  Most companies designing products with a number of variants have a basic platform that acts as the starting point, and the goodies that distinguish one variant from another represent a very small percentage of the whole design.  For this small percentage, ChipX drops in a block of structured ASIC fabric.  You can use this to quickly spin product variants without re-designing (and without paying the extra NRE for) the basic platform. [more]