CURRENT FEATURE ARTICLES

Zeroing in on Power
Altera Announces Max IIZ
Using CPLDs to Replace or Augment Microcontrollers
by James Adams, Altera Corporation
Legacy of Languages
Culture in Code
Altium Goes 3D
Board Design can be Fun
Improving ADC Results Through Oversampling and Post-Processing of Data
by Jim Vorgert, Actel Corporation
Designing Down Power
Actel Boosts Low-power Tool Suite
Physical Synthesis Flows for FPGA Designs
by Frédéric Rivoallon, Xilinx, Inc.
MicroBlazing Away
Xilinx Boosts Embedded Ecosystem

JOURNAL WEBCASTS

Xilinx Virtex-5 Power Optimization & Power Design Guidelines (Xilinx)

Virtex-5 FPGAs and PlanAhead Deliver Maximum Performance (Xilinx)

Accelerate Delivery of Built-in Ethernet Solutions Using ilinx FPGAs and Gigabit Ethernet Development Kit (Xilinx)

Discover How to Design With and Take Advantage of the PCI Express Hard Block in the Virtex-5 FPGA (Xilinx)

Discover How the Complete Virtex-5 PCI Express Solution Reduces Risks for Your Application (Xilinx)

An Introduction to the Xilinx Virtex-5 FPGA Family (Xilinx)

Addressing Size, Weight, and Power Constraints (Altera)

Enable High-Volume Applications with New Low-Cost FPGAs (Altera)

Implement PCIe, GbE & SRIO with Altera's Low-Cost FPGAs (Altera)

CHALK TALK Advancing SoC Verification Methods – Join Amelia Dalton as she talks with experts from Mentor Graphics on processor-driven test and other techniques for solving your system-on-chip verification problems. (Mentor Graphics)

CHALK TALK Real World Solutions for FPGAs in Ultra Low Power Applications - Join Amelia Dalton as she examines the Low Power Reference Platform from Arrow, Altera, and Linear Technology - proving that FPGAs really can run on batteries. (Altera, Arrow, Linear)

CHALK TALK Did you miss the ARM Developers' Conference?  Join Amelia Dalton for Journal Webcasts' coverage of the event - it'll be just like you were there! (Journal Webcasts)

Zeroing in on Power
Altera Announces Max IIZ

Pushing programmable logic into portables is a power play.  Portable devices put power consumption at a premium, and silicon vendors looking for a socket have to answer for each and every coulomb consumed by their chips.  Of course, they’re also interested in absolute minimal cost and board real estate, so getting a programmable device into your portable is unlikely at best.

Now, Altera’s somewhat uncategorizable Max II family is adding a super-stingy “zero power” (meaning “not very much power”) Max IIZ version to the lineup.  Altera is not the first to go nello on power with their FPGA/CPLD marketing.  They’re just resurrecting the ruse used by companies like Philips and Lattice Semiconductor a few years back (apparently, the “zero power” term comes from dropping below the milliamp threshold of older ammeters with microamp devices and getting a reading of zero.) While we’re not necessarily buying into the whole “zero power” concept, it is nice to have a device with very, very low static power consumption so that you’re not draining batteries while doing nothing.  By the way, in our old math book, anything to the “zero power” equals one. 
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Using CPLDs to Replace or Augment Microcontrollers
by James Adams, Altera Corporation

Using CPLDs to Replace or Augment Microcontrollers
With the advent of low-power CPLDs, electronic product designers now have new options for implementing many of the functions traditionally performed by microcontrollers. This article discusses several ways design scenarios that are advantageous to use a CPLD instead of a microcontroller, and when it makes sense to use a CPLD as a companion to a microcontroller.

Introduction
Tell a group of portable electronics designers that there is a low-power digital device that allows them to use a software program to reconfigure the operation of the hardware, and nine out of ten will likely assume that it is some form of microcontroller. This is understandable. [more]