a techfocus media publication :: November 27, 2007 :: volume XVII, no. 09

FROM THE EDITOR

This week, we got a call from Altium Limited about the new version of their Altium Designer product.  In addition to providing vendor-independent FPGA design, Altium Designer is making tracks as a whole-system design suite with innovative features in PCB design and layout, system-level design with a point-and-click platform creation tool, and software acceleration with a new compiler that converts ANSI C code to FPGA-based hardware.  Our latest feature has the details.

Also new this week is a contributed piece from Jim Vorgert of Actel.  Jim tells us about improving our results on analog-to-digital conversion using techniques like oversampling and post-processing.  If you’re interested in getting more effective resolution or higher sample rates, you’ll want to take a look at Jim’s article.

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Kevin Morris – Editor
FPGA and Structured ASIC Journal


CURRENT FEATURE ARTICLES

Altium Goes 3D
Board Design can be Fun
Improving ADC Results Through Oversampling and Post-Processing of Data
by Jim Vorgert, Actel Corporation
Designing Down Power
Actel Boosts Low-power Tool Suite
Physical Synthesis Flows for FPGA Designs
by Frédéric Rivoallon, Xilinx, Inc.
MicroBlazing Away
Xilinx Boosts Embedded Ecosystem
FPGAs Control Graphics and Video in Embedded Systems
by Kerry Howell, Lattice Semiconductor Corporation
FPGA BASE Jump
Partial Reconfiguration for SDR

JOURNAL WEBCASTS


Altium Goes 3D
Board Design Can Be Fun

He holds the joystick with a light, experienced grip – his eyes fixed on the screen.  His hands are steady as his viewpoint skims through a rotating object resembling a cityscape with strange buildings and vast networks of roads interconnecting them.  He then dives below the surface, moving through the layers of the virtual world, flying past cylinders that look like giant elevator shafts bridging the levels.  He slows as he comes to the area he’s interested in. 

There, he spots a problem.  A buried via is dangerously near a mounting hole, creating the possibility of a short when mounting hardware is inserted and normal manufacturing variations skew toward their limit.  Switching to a 2D view, he corrects the problem.  While this may look and feel like the next version of some Xbox 360 game, Altium, Ltd. says they are sticking to the more traditional PC platforms for now.  [more]

Improving ADC Results Through Oversampling and Post-Processing of Data
by Jim Vorgert, Actel Corporation

Today’s mixed-signal programmable system chips (PSCs) include a configurable successive approximation register (SAR) analog-to-digital converter (ADC). These ADCs are often the architecture of choice for medium-to-high resolution applications with sample rates under 5 megasamples per second (Msps) and resolution ranging from 8 to 16 bits. This resolution is sufficient for a variety of applications, such as portable or battery-powered instruments, industrial controls and data or signal acquisition.

The implementation of a sophisticated reconstruction algorithm can enhance the results of an ADC, but in many cases, it is not cost effective or necessary to do so. [more]

EVENTS & ANNOUNCEMENTS

Synplify Premier software from Synplicity fully understands DSP oriented FPGA architectures and can take full advantage of their capability. You can quickly analyze different FPGA architectures and vendor devices to determine the best implementation vehicle for your DSP design.
Click here to learn more.


Serial FPDP IP Core for Virtex-5 FPGAs
VMETRO’s s FPDP IP core includes support for the full serial FPDP specification on Xilinx Virtex-5 and Virtex-4 FPGAs with RocketIO interfaces.
Learn more.


New!  IC Journal - Do you love FPGA Journal? We're happy to announce our new IC Design and Verification Journal.  It'll be just like FPGA Journal except, you know, about ASICs and stuff.  Subscribe today for free.
Learn more.


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