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Flash Flood
Inside FPGAs' Non-volatile Companions
For many of us in the FPGA world, flash is one of those technologies we tend to take for granted. “Yeah, and we’ll just throw some commodity flash in there for configuration and stuff.” With little fanfare, we throw down some device and hook it up like the datasheet says, or like it was hooked up on the development board, and give it very little thought after that. The thing is, flash is an incredibly versatile and dynamic technology, and understanding it can help us make better design decisions that can dramatically improve (and sometimes save) our development projects.
Last week, the second annual Flash Memory Summit took place in Santa Clara, CA. FPGA Journal dropped in on the event in an effort to learn more about the latest trends in the volatile world of non-volatile memory. We found a tremendous amount of energy as well as a great deal of confusion and controversy surrounding our little double-gated buddies.
Flash memory has been with us since 1984 when Toshiba’s Fujio Masuoka announced the invention the first flash technology. The name “flash” was appended to the EEPROM technology after a colleague suggested that the process for erasing the devices was similar to a camera flash. There are two primary types of flash on the market today. NOR flash (which gained popularity early due to the full random-access address/data bus structure) and NAND flash (which is more recently popular because of its much higher densities, longer life, and lower cost). [more]
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