a techfocus media publication :: June 5, 2007 :: volume XV, no. 09

FROM THE EDITOR

This week, we’re broadcasting FPGA Journal from the 44th annual Design Automation Conference (DAC) in San Diego, California.  This week, FPGAs are at the center of activity and controversy at DAC as long time FPGA tool supplier Synplicity announced that they are acquiring Swedish Hardi Electronics.  The result of the acquisition will be a complete hardware and software system for FPGA-based system prototyping.  Our latest feature has the details.

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Kevin Morris – Editor
FPGA and Structured ASIC Journal

LATEST NEWS

June 5, 2007

Vectron International Crosses the Gigahertz Barrier with Introduction of New Voltage Controlled SAW Oscillators

Micrel Announces New 2.5 Gbps GPON ONU Transceiver Solution

Synopsys Launches VMM Catalyst Program With More Than 50 Member Companies

Xilinx Cuts Development Time for Hand-Held Devices With New Low-Cost CoolRunner-II Starter Kit

Synplicity Unveils Confirma Platform for At-Speed ASIC/ASSP Verification

June 4, 2007

Lattice Delivers Industry's Fastest Memory And Hypertransport Technology I/O

Synplicity-Xilinx Joint Task Force Delivers Real Benefits for Ultra High-Density Designs

ProDesign Introduces the CHIPit Platinum V5 and Reaches a New Level in High-End ASIC and SoC Prototyping

EMA TimingDesigner 9.0 – New Design Kits Save Designers Valuable Time to Market

IDT Low Power PCI Express® Switches Optimized for I/O Connectivity Named to the PCI-SIG PCI Express Integrators List

FS2 Introduces System Navigator™ Probe for Development Using the New Ultra Low Power Handshake Solutions Memory Extension HT80C51 Core

June 1, 2007

Synplicity Announces Agreement to Acquire HARDI Electronics AB

Informative Full-Day Tutorials at 44th Design Automation Conference

May 31, 2007

HDL Companion, the Swiss Army knife becomes more versatile

May 30, 2007

HARDI Electronics teams with LSI to offer SerDes for ASIC Prototyping

Stephen Bailey to Receive Accellera's 2007 Technical Excellence Award at DAC
Award Recognizes Bailey's Leadership of the Unified Power Format Standard

The MathWorks Highlights Model-Based Design for Electronic Systems and Software at DAC 2007

OneSpin Joins EDA Design and Verification Standards Group Accellera

May 29, 2007

Lattice Semiconductor Announces Industry's First True 90NM Non-Volatile FPGA Family

CURRENT FEATURE ARTICLES

FPGAs at DAC
Programmable Logic Powers Verification

Lattice Leaps Forward
90nm XP2 a Fit Sequel
FPGA Packaging and Signal Integrity
A Connectivity Perspective

Merging Lanes
Will FPGAs Re-converge?

Beyond the Go Button
Taking More Control of FPGA Design
Serial Commodotization
Altera Arria GX

It Isn’t Easy Being Green
Weee Review RoHS Basics
The Value of a Complete FPGA Design Flow
by Tom Dewey, Mentor Graphics

JOURNAL WEBCASTS


FPGAs at DAC
Programmable Logic Powers Verification

This week, at the Design Automation Conference (DAC) in San Diego, FPGA tool specialists Synplicity announced the acquisition of the Swedish company Hardi Electronics – supplier of FPGA-based prototyping boards.  Why is this interesting?  It gives us a number of insights into the increasing role of FPGAs in system-level verification, the complex nature of the tools market for FPGAs, and the volatility of the EDA business in general.

FPGAs have long been used as prototyping vehicles for ASIC designs, ASSP designs, board-based system designs, and of course for FPGA-based designs.  As a long-time leading vendor of FPGA synthesis technology, it made sense for Synplicity to capitalize on the prototyping trend by providing tools to support the use of FPGAs as prototyping vehicles.  For years now, the company’s “Certify” product line has been a standard for partitioning and re-purposing RTL code intended for ASIC implementation into multi-FPGA prototypes.  Even though VHDL and Verilog are generic, the architectures created for ASIC-bound designs contain constructs that are not friendly to FPGA realization.  Certify takes those ASIC-isms out of the code, partitions large designs across multiple FPGA devices (including generating interfaces between the FPGAs), and makes versions of the code suitable for synthesis into FPGA-based prototypes.  [more]


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