Signal Processing on the Cheap
Xilinx Introduces Spartan-DSP

Xilinx might not want this article in FPGA Journal. All of us who have lived and learned in the land of LUTs are not the citizens of greatest concern for their latest announcement. We aren’t the gleam in the eye of their marketers or the glowing target in the crosshairs of their sales channel for their newest product. What Xilinx’s newly announced Spartan-DSP desires is the attention of the unannointed – the software-savvy system engineers who have long relied on digital signal processing devices to do their dirty work and who now face performance obstacles that their traditional go-to DSP devices can’t handle.

DSP with FPGAs is no longer a new idea. Folks with performance problems in areas like video and image processing have long relied on FPGAs parked next to general purpose processors or DSPs to parallelize the problem tasks and make monster problems manageable. Those people,
however, already understood the FPGA parlance. They spoke the language and were already converted to the religion. Now, with Spartan-3A DSP, the cost of entry into the realm of DSP acceleration with FPGAs is dramatically lowered, and the legions of cost-sensitive, performance-hungry applications are officially invited to join the club.

Since the beginning, low-cost FPGAs have been at least mildly competent at algorithm acceleration. FPGA vendors spent the silicon real-estate required to stack a few dozen hardware multipliers onto even the most spartan of FPGAs. The Real DSP capabilities, however, were reserved for the more expensive flagship devices. There was where one typically found the more sophisticated DSP blocks with hard-wired multiply/accumulate, enough RAM to be interesting, and I/O capable of moving masses of data around at speeds that would feed all that parallel processing power.

With Spartan-3A DSP, Xilinx has lowered the price of admission into high-performance DSP. The new family is based on the company’s well-established Spartan-3 fabric, with the added power management features of the 3A series. On top of that platform, Xilinx dropped in an array of fully-capable DSP blocks – including a great deal of potentially Virtex-cannibalizing capabilities. Xilinx heard from customers that the Virtex-class devices met a strong need in high-end applications like wireless base stations, high-definition video encoding, surveillance, broadcast, and 3D medical imaging, but more price-sensitive markets such as wireless, video, and consumer were still unserved by the most expensive high-end FPGAs. By the same token, the standard low-cost FPGA offerings didn’t have quite the capabilities that these broader, high-volume markets required to solve their signal-processing deficits.

These new markets need more than a cheap piece of silicon to meet their acceleration needs, however. The timely design of the DSP portion of these systems is a big part of the problem, and FPGAs are notoriously enigmatic for typical software-centric DSP engineers. To this end, Xilinx will lean on the years of infrastructure development investment that has, through a combination of internal and partner efforts, brought them to their current state of DSP design capability. What is that state? Well, the classic DSP programmer probably hasn’t shifted much toward FPGAs in his thinking. He still wants to code (or re-use) algorithms in C for a software-driven DSP processor. He might also model his algorithms in MATLAB to get the basic idea right before he goes to code. [more]