QUARTERLY SPOTLIGHT :: SUMMER 2006

INTRODUCTION

Welcome to the Journal Quarerly Spotlight! This time, we once again turn our spotlight on digital signal processing with a collection of white papers that will help you get those tricky DSP and video processing algorithms designed, refined, and working in silicon. From wireless communications to video processing to RFID, we've got you covered with this latest collection of informative pieces from our leading technology partners.

We hope you enjoy this popular supplement to FPGA and Structured ASIC Journal and Embedded Technology Journal.

Kevin Morris – Editor
FPGA and Structured ASIC Journal

CONTENTS

Rapid Prototyping and Verification of MIMO Systems - A practical approach to system implementation using MATLAB and Virtex-4 FPGAs
Xilinx, Inc.

FPGA Co-Processing Architectures for Video Compression
Altera Corporation

Efficient Development of Wireless IP
with High Level Modeling and Synthesis

Synplicity, Inc.

Designing an FPGA-Based RFID Reader
You can implement a practical, standards-compliant RFID reader using
off-the-shelf RF components and FPGAs.

Linear Technology Corporation

Rapid Prototyping and Verification of MIMO Systems - A practical approach to system implementation using MATLAB and Virtex-4 FPGAs
Xilinx, Inc.


SPONSORED WHITE PAPER

Spatially multiplexed multiple-input multiple-output (MIMO) transmitters and receivers promise significant performance gains for wireless communications systsems over their existing single-input single-output (SISO) counterparts. Next-generation wireless standards, such as 802.11n, will support data transmission rates as high as 600 Mbps and wireless local area network transmission rates in excess of 1 GHz.

The design of these systems, however, forces a compromise in cost and power that can have significant consequences for handheld devices running on batteries. The challenge facing design teams is to determine the optimal balance between these design requirements for their particular application.

At the heart of this technology is the concept of multipath, which refers to the reflection of radio frequency (RF) signals in a physical environment. Whereas multipath degrades the performance of existing 802.11 devices, spatially multiplexed orthogonal frequency division multiplexing (OFDM)MIMO – a key element of the 802.11n standard– takes advantage of these reflections to "tune" transmissions, minimize errors, and improve overall performance. But at these bandwidths, scattering, diffraction, and absorption by objects in the transmission path are an important consideration. Designing a MIMO system requires that these effects are profiled as accurately as possible in the form of a channel model. [more]


FPGA Co-Processing Architectures for Video Compression
Altera Corporation


SPONSORED WHITE PAPER

Overview
The push to roll out high definition video enabled video and imaging equipment is creating numerous challenges for video system architects. The increased image resolution brings with it higher performance requirements for basic video data path processing and next-generation compression standards, outstripping that which standalone digital signal processors (DSPs) can provide. In addition, the system specifications require designers to support a range of standard and custom video interfaces and peripherals usually not supported by off-the-shelf DSPs. While it is possible to go the route of application specific integrated circuits (ASICs) or use application specific standard products (ASSPs), these can be difficult and expensive alternatives that might require a compromised feature set. Furthermore, these choices can hasten a short product life cycle and force yet another system redesign to meet varied and quickly changing market requirements.

Field programmable gate arrays (FPGAs) are an option that can bridge the flexibility gap in these types of designs. Additionally, with the increasing number of embedded hard multipliers and high memory bandwidth, the latest generation of FPGAs can enable customized designs for video systems while offering a manifold performance improvement over the fastest available stand-alone DSPs. Designers now have the ability with state-of-the-art FPGA co-processor design flows to implement high-performance DSP video and image processing applications. This new generation of tools facilitates the design of a system architecture that is more scalable and powerful than traditional DSP-only designs while at the same time taking advantage of the price and performance benefits of FPGAs. [more]


Efficient Development of Wireless IP
with High Level Modeling and Synthesis

Synplicity, Inc.


SPONSORED WHITE PAPER

Overview
Over the last decade, digital wireless technologies have become one of the leading drivers of semiconductor growth and also a source of increasing design complexity. In nearly every application category, new wireless standards are pushing for higher performance and capacity by using more sophisticated algorithms. A good example is 802.11n, the much anticipated new WLAN technology that promises to deliver data rates up to 600Mbps. Other examples include WiMAX, 3G and 4G Cellular technologies, Digital Video Broadcast (DVB), Software Defined Radio for military radios, and so on. Most of the end markets driving these applications are either in early stages of very rapid growth, or are more established markets under pressure to upgrade performance and capacity to meet competitive demands. In either case, the demands trickle down to the design teams who are challenged to deliver the increasingly complex IP in less time.

In the past, the semiconductor industry has met this type of challenge by introducing higher levels of design abstraction. The most recent example is the growth of Verilog and VHDL methodology over the last 15 years for logic design. IC engineers can rapidly model, simulate, and synthesize implementation at the logic level which realizes a huge productivity improvement over design at the gate or transistor level. [more]


Designing an FPGA-Based RFID Reader
You can implement a practical, standards-compliant RFID reader using
off-the-shelf RF components and FPGAs.

Linear Technology Corporation


SPONSORED WHITE PAPER

Radio-frequency identification (RFID) is an auto-identification technology similar to other common auto-ID technologies such as bar codes or magnetic strips. A physical object is associated with a unique identifying number (UID) that is incorporated in an RFID transponder, or "tag." The tag is usually attached to a physical object, such as a carton, a pallet, or a container filled with a product. An RFID reader (interrogator) extracts the UID from the tag.

A basic RFID system has three components: an antenna or coil, a transceiver with a RFID decoder, and an RFID tag programmed with the UID. Table 1 shows the four commonly used RFID frequencies and their potential applications. The frequency of greatest commercial interest at this time is UHF, with potentially large volume applications in supply chain management.

EPC Tags
EPC stands for electronic product code, a standard for RFID tags, including both the data content of the tag and the open wireless communication protocols. The EPC movement combines data standards used in bar-code specifications with the wireless data communication standards that ANSI and other groups have developed by (802.11b). The EPC standard currently employed in supply-chain management is EPC Class 1 Gen II. [more]


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