FROM
THE EDITOR
This week, yet another new FPGA family rolls out of the gate and sprints into the low-cost programmable logic derby. Xilinx has begun to move the multi-flavor strategy they proved with Virtex-4 (and now continue with Virtex-5) into the low-cost arena. Now, in addition to the generic Spartan-3 family, they have additional flavors with proportionally more logic (Spartan-3E) and now, proportionally more I/O (Spartan-3A). More I/O per buck isn't the only thing the new 3A family brings to the party, though. Our newest feature has the details.
Our second new feature this week comes from Magma's Sheldon D'Paiva. Sheldon looks at a unified approach to FPGA synthesis and layout similar to that used in high-end ASIC. With the challenge of high-end FPGA design attracting the attention of more EDA companies, the user community can't help but benefit with stronger, more capable tools.
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FPGA and Structured ASIC Journal
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EVENTS & ANNOUNCEMENTS
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Pins for Pennies
Xilinx rolls out Spartan-3A
The low-cost FPGA battle is now officially on fire. Not that long ago, the FPGA race was two-dimensional – whoever could provide the most programmable logic running at the highest Fmax was the winner. Considerations like cost, power, and feature sets were almost irrelevant. The people (telecom infrastructure) buying FPGAs were scrambling to deploy as much bandwidth as they could as quickly as possible. They had big budgets and bigger power supplies. The FPGA business was relatively simple.
As the technology has matured and broadened, however, specialization has taken over. It may seem paradoxical that a technology touted for its general-purpose applicability and extreme flexibility would begin to be differentiated by specialization, but that is exactly what is happening. The number of dimensions to the "best FPGA for my job" decision has exploded, and designers around the world are faced with a complex matrix of factors to consider in choosing the best FPGA for their application.
The specialization started not that long ago (in market time) when FPGA companies got the idea to create "low-cost" or "value-based" FPGA families. They reasoned that their large devices had grown so much and so quickly that they might be leaving behind a robust market for their smaller devices. They also noticed that the same technology advances that made their biggest and fastest devices so big and fast could also be applied to make more modest devices very, very inexpensive. Any way you want to do a comparison, today's low-cost FPGAs are orders of magnitude cheaper per capability than anything available even at the beginning of this decade. [more]
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Unified FPGA-ASIC Design Flow Provides Designers Versatility in Meeting Production Goals
by Sheldon D'Paiva, Magma Design Automation
Today's fast-paced chip delivery schedules require that logic designers employ design flows that are versatile enough to take advantage of several implementation technologies. Specification changes, pricing or yield issues, and production ramps can change the target implementation technology for a design. Designers might be required to change FPGA devices or vendors, or move their designs from prototyping in an FPGA to production with an ASIC.
Making a decision on whether to use FPGAs or ASICs is based on several requirements including performance, power, unit volumes and time to market. In some cases, FPGAs are used to get the product to market before competitors, and then converted to ASICs during production ramp. Extremely high-performance or low-power designs usually mandate the use of ASICs. In production runs exceeding 50,000 units, ASICs have a low per-unit cost. However, this equation may be changing. Rising capabilities and shrinking price points are making FPGAs an increasingly viable alternative to ASICs for complex designs and larger production runs.
For example, according to industry research, ASIC design starts will decline to fewer than 4,000 in 2006, while FPGA design starts hit 90,000 in 2002 alone. Many of these starts no doubt follow the path from design to prototype to production. As FPGAs encroach upon the ASIC domain for both production and prototyping, the line between FPGA and ASIC designs has blurred to the extent that designers now seek the capability to use an FPGA for one project, and then switch to an ASIC for the next. [more]
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