a techfocus media publication :: November 7, 2006 :: volume XIII, no. 06

FROM THE EDITOR

This week, Altera blasts into the world of 65nm FPGAs with the announcement of their new Stratix III FPGA family.  Stratix III is bigger, faster, more versatile, and most significantly - much lower power than previous generation (90nm) FPGAs.  Our latest feature article takes an in-depth look.

Our second new article comes from Terry Danzer of AMI Semiconductor.  Terry discusses options for conversion of FPGA designs into ASICs for cost reduction, performance improvement, and power savings.  AMI has made a specialty of FPGA conversions for years, and Terry is able to lend some useful insight on the subject.

Our Journal Forums poll this week asks when you will start considering 65nm FPGAs in your design projects.  Register, vote, read the results… It’s already that kind of day here in the US.  Here’s a chance for you to have a much more measurable (but modest) impact.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at:
comments@fpgajournal.com. If you'd rather sound off in public, please post your comments or questions in our new Journal Forums.

Kevin Morris – Editor
FPGA and Structured ASIC Journal

EVENTS & ANNOUNCEMENTS

FPGA Designers!
Share your expertise and case studies at U2U 2007, the Mentor Graphics User Conference.
Call for Papers ends Nov. 13, extension possible.
$1,000 Best Paper Award in each track
Conference is March 14-15, 2007, San Jose, CA.
Complete details and submission form


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CURRENT FEATURE ARTICLES

Stratix III
Altera Sails into Sixty-five
Low-Cost ASIC Conversion Targets Consumer Success
by Terry Danzer, AMI Semiconductor, Inc.
The Haunting of Fab 51
An FPGA Designer's Nightmare
Adrift...
Dataquest Dumps Design Automation
Sensible SerDes at Sixty Five
Xilinx Launches LXT
Making the MOST
Xilinx Targets Telematics Bus
Power Parallelism
Ambric Accelerates Algorithms

JOURNAL WEBCASTS


Stratix III
Altera Sails into Sixty-five

With the usual next-node battle cry of "power, performance, price, and productivity," Altera sailed into sixty-five-nanometer territory today with the announcement of their much-anticipated Stratix III 65nm high-performance FPGA family. 

Altera has put considerable focus on power with this family, bringing in power-targeted architectural changes paired with powerful design tool support.  For years, power in FPGAs was not an important consideration.  The people paying the big bucks for older-generation FPGAs had power to burn along with their cash.  As times and technologies have changed, however, so has the power picture.  Millions of transistors have turned into billions, megahertz have multiplied, and leakage currents have leapt into prominence, as feature sizes (and thus gate oxides) have continued to shrink.

On the system side, FPGA power has gained prominence, too.  As bandwidth requirements have risen, form factors have shrunk, and heat has become an issue.  Also, with FPGAs moving from supporting cast to starring roles in many systems, they have taken the spotlight in power consumption as well.  The result of all this is that Altera saw a chance to make power a clear differentiator with Stratix III, and they've made significant strides with their efforts.

With 65nm, we expected supply voltages to be down to 1.0V.  Altera has thrown us a bit of a surprise with both 1.1V operation for maximum performance and 0.9V for minimum power consumption. The lower voltages help with the dynamic power picture right from the start, and the 0.9V option offers to cut static power by over half from Altera's 90nm Stratix II numbers.  [more]


Low-Cost ASIC Conversion Targets Consumer Success
by Terry Danzer, AMI Semiconductor, Inc.

Design for portability is a valuable technique for engineers targeting consumer markets, seeking a cost-effective transition from an FPGA platform used for rapid development and prototyping to create price-competitive products that will win sales in fast paced consumer market.

Design Conversion for Marketing Objectives

FPGAs (field programmable gate arrays) provide a powerful tool for designers seeking to satisfy consumer demands for complex, multi-functional products. The FPGA’s fast development cycles accelerate the learning and debugging processes, which serves demands for short time-to-market that is characteristic of the consumer space. Initial product development using an FPGA solution also facilitates entry into new and untried markets at lower cost and dramatically reduced risk.

But the intense price pressures that characterizes most consumer electronic markets, does not match with the relatively high costs of FPGA silicon and packaging. Power consumption in FPGA’s can be also be high, compared to that of an application specific implementation. This can be a significant drawback, particularly if the end product is battery powered. [more]


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