a techfocus media publication :: March 7, 2006 :: volume X, no. 09


FROM THE EDITOR

This week, Actel’s already wildly flexible Fusion line further increased its multi-tasking capability by adding an ARM7 32-bit soft processor core. Our newest feature article looks under the hood of this innovative new high-water mark of programmable system chip convergence. There’s much more to the story than dropping some new IP on a die.

Next, we have an article from Rahul Shah of eInfochips discussing the implementation of image processing algorithms using FPGAs as accelerators. The parallel processing DSP capability of the latest generation of FPGAs is ideal for many high-demand image processing applications.

Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com

Kevin Morris – Editor
FPGA and Structured ASIC Journal

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LATEST NEWS

March 7, 2006

Airbee Announces New OS for Low Power RF Mesh Applications

GDA Announces PCI Express Gen II (Version 0.7) Technology Compliance

March 6, 2006

Novas and Altera Collaborate on Bringing Benefits of New Visibility Enhancement Technology to FPGAS

CAST and Cortus to Partner on New Processor Cores

Denali Announces PureSuite Product for PCI Express 2.0 Technology

Actel Simplifies Real-World Embedded Designs with ARM7-Enabled Fusion Programmable System Chips

H.264 Codec Leader Launches Hardware IP for High Definition Encoder for Resolutions up to 1080p

March 2, 2006

Spectrum Signal Processing Introduces the SDR-3002 EWRDP for Electronic Warfare Applications

Spectrum Offers SDR-3003 ISMRDP Single Slot Modem Rapid Prototyping Platform for International MILCOM Development

Photron Technologies Commences Final Implementation Stage for Innovative Wireless Technology

March 1, 2006

Taiwan's Fineac Chooses
LatticeXP FPGAs For eHD Network System Storage

QuickLogic Companion Device Enables Energy Efficient HDD and PCI Connectivity to Intel PXA Processor

February 28, 2006

Xilinx First to 65nm With Next Generation Virtex FPGAs

Arrow Electronics and QP Semiconductor Partner to Supply Simple (SPLD) and Complex (CPLD) Military Programmable Logic Devices

RapidIO(R) Trade Association Recognizes Collaborative Efforts of Ecosystem Members to Test Serial RapidIO Component Interoperability

CURRENT FEATURE ARTICLES

Fusion Adds ARM
Actel’s Embedded Wonder Gets Smarter

Image Processing Applications On New Generation FPGAs
by Rahul V. Shah, eInfochips Ltd.

SDR Prêt-à-Porter
ISR and Xilinx Roll Out Ready-to-Wear SDR

Think You Know Where Structured ASICs Belong?
by Naveed Sherwani, CEO and President, Open-Silicon

Upping the Low-Cost Ante
Lattice Raises the Stakes at 90nm
How to Avoid PCB Libraries Stifling FPGA Design
by Dave Brady, Mentor Graphics Corporation
Lattice Joins the Fray
New 90nm LatticeSC Hits the High End
Planning Ahead
Xilinx Updates Hierarchical Design Tool
Reconfigurable Computing in Real-World Applications
by Steve Margerm, Cray, Inc.

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Fusion Adds ARM
Actel’s Embedded Wonder Gets Smarter

It slices, it dices, and it has flash-memory. It gets your whites whiter, removes those collar rings, and flaunts flexible FPGA fabric. It has more flavor, is less filling, and boasts programmable analog to boot. It softens your hands while you do the dishes and offers a wide selection of pre-configured IP. Now how much would you pay? Well don’t answer that because now, Actel’s already incredible versatile Fusion programmable system chips also pack an available ARM7 processor.

Actel’s claims about Fusion sound like something from one of those impossibly overblown daytime soap opera commercials. Fusion is an incredibly versatile, in-system reprogrammable system-on-a-chip platform that incorporates programmable analog, custom digital logic fabric, embedded flash and SRAM, and versatile IO options. Now, just when the embedded systems equivalent of the Swiss army knife was almost too big to fit in the pocket of your Gore-Tex pants, Actel has added the option of an embedded configurable 32-bit ARM7 core and peripherals.

Just about the only thing you’ll need to fuse to your fusion device to build whatever it is you’re building is some commodity-grade DRAM. After that, you can probably just start shipping boards while your marketing department decides whether your product will be a motor controller, an MP3 player, or a digital multi-meter. OK, that might be a stretch. But the point is, Fusion will let you design just about anything on a single chip with the flexibility to reprogram it in the field.

For the risk-averse system designer, the first-to-market innovator, the we’re-not-quite-sure-what-we’re-making marketer, or the (oh, I’m so jealous, why didn’t we have these when I was in college?) precocious university engineering student, an ARM-enabled Fusion device on a development board will let you light up some serious LEDs with your idea faster than just about any other approach. [more]

Image Processing Applications On New Generation FPGAs
by Rahul V. Shah, eInfochips Ltd.

The new generation of FPGAs with DSP resource and embedded processors are attracting the interest of the image processing market. With enhanced capabilities most of the DSP processing work can be off loaded from the software program stack to embedded processors and DSP resources on the FPGA to improve performance and reduce the cost of the whole system.

The traditional way of implementing algorithms in software limits the performance because the data is processed serially. Frequency of operation can be increased up to a certain extent to increase the performance or the required data rate to process the image data, but increasing the frequency above certain limits causes system level and board level issues that become a bottle neck in the design.

With the current image processing applications moving towards consumer markets, the amount of data to be processed has increased at a fast pace. The new compression algorithms on the market are keeping up with the increasing data requirement. [more]

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