Field Programmable Journalism
Learning from a Programmable Publication

Content and concept are an interesting combination. People read FPGA and Structured ASIC Journal each week to learn from its content – articles, announcements, analysis, advertisements, and alliteration -- all of them working together to inform and entertain engineers interested in programmable logic and structured ASIC design. Interestingly, it turns out that there’s a lot we can learn about programmable logic from FPGA Journal’s concept, too. That’s because FPGA Journal is to technical publications what FPGAs are to system design – highly flexible, fast to market, field programmable, field upgradeable, and at times, a fair bit of fun.

You choose an FPGA because, perhaps, your design needs to get to market fast without all the process hurdles of a custom ASIC or even a board. Using an FPGA on a readymade board, you can whip up a complex custom circuit with a very small team in nothing flat. Each Monday, using our online publishing system, we create a new issue of the FPGA Journal and Embedded Technology Journal newsletters, update the websites to match, and distribute the two publications to over 26,000 subscribers in less than 24 hours. While you may argue that daily newspapers have been pulling off comparable feats for a century or so, we do the entire operation, including delivery (Did I mention that we deliver to over 85 countries?) with single-digit layout, publishing, and distribution staff. That digit is also less than five.
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Design Challenges Flow Down-Stream
by Dave Wiens, Mentor Graphics Corporation

Innovations within one domain of electronic product design typically have an unforeseen impact on other areas. For instance, innovation within FPGA devices that has enabled increased functional complexity and I/O performance has introduced challenges downstream during PCB design. Increased functional complexity has resulted in increased I/O pins per device and increased package pin density. In addition, increased I/O performance has resulted in a tighter set of PCB interconnect constraints to minimize degradation of high-speed signals as they travel between devices. The ability to leverage FPGA I/O flexibility to optimize FPGA/PCB performance offers significant value, but has been well documented, and will not be addressed in this article.

Impact of increased functional complexity
The drive towards complex systems-on-FPGA has coupled with the drive for reduced product form factors, resulting in the perfect storm on a PCB: incredibly high pin count devices packed into incredibly small packages. The PCB designer has been left with the challenge of effectively connecting the high-density device to the rest of the components on the board. Decreasing the dimensions (e.g. trace widths/spacings and drill hole sizes) of traditional copper-on-laminate through-hole PCB structures so the connections can be made has not worked – the reduced dimensions stretched the PCB fabrication envelope, resulting in lower than acceptable yields.
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EVENTS & ANNOUNCEMENTS Net Seminar - "Design ASSPs Faster" View this net seminar from Altera to learn key reasons why it makes sense to develop your ASSP design with an FPGA, and how you can still have the option to use cost-reduced structured ASICs for volume production. Click here to view seminar Achieve synergy from design to production with Altera. Only Altera gives you the ability to accelerate time to market with high-density FPGAs and also increase profitability with structured ASICs. Take advantage of both the inherent flexibility of Stratix II FPGAs and the low cost of HardCopy II structured ASICs with a seamless migration between the two. Learn how Altera's Stratix II FPGAs and HardCopy II structured ASICs together provide a unique synergy from design to production. Click here for more info FIND A BETTER JOB. Browse new JOURNAL JOBS section from FPGA Journal to find challenging and rewarding opportunities with the FPGA industry’s top companies. Journal Jobs is specifically for FPGA professionals – more of what you’re looking for, less of what you’re not. Browse now! EMBEDDED TECHNOLOGY JOURNAL - A weekly e-mail newsletter from techfocus media (publishers of FPGA and Structured ASIC Journal) dedicated to the design and application of embedded systems and software. SUBSCRIBE NOW - FREE!