a techfocus media publication :: December 27, 2005 :: volume IX, no. 13


FROM THE EDITOR

This week, we end a fascinating 2005 with a look back at the trends that marked a transitional year in programmable logic and structured ASIC. Our FPGAs and SAs may look pretty much the same as they did a year ago, but a dramatic change has taken place behind the scenes in design tools, in IP, and in innovative architectures that may not fully manifest themselves for years to come.

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FPGA and Structured ASIC Journal

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CURRENT FEATURE ARTICLES

Tale of the Tools
2005 in Review
Altera Looks Forward
Insight from an Industry Leader
Bundling Performance
Lessons from Xilinx ISE 8.1i
More and Moore
Xilinx Looks Ahead to 65nm
Just What is Algorithmic Synthesis?
by Bryan Bowyer, Technical Marketing Engineer, Mentor Graphics Corporation
Looking Inside
FPGAView Extends Logic Analyzer's Reach
Need More Performance?
Simply Increasing the Clock Frequency May Not be the Answer
by Adrian Cosoroaba, Xilinx Inc.


Tale of the Tools
2005 in Review

Geologic time is difficult for humans to visualize. Great continents slamming into each other with epic force, reshaping the earth’s surface, don’t seem so impressive when the movement is slowed down to an almost imperceptible rate. The only time we notice the effect is when transients like earthquakes, tsunamis and volcanic eruptions hint at the unwavering determination of the underlying forces. As electronic designers, however, we have some facility in dealing with alternate orders of magnitude in the time scale. We understand that nanoseconds and milliseconds are worlds apart, even though, as humans, we can’t perceive a difference in real time. We learn to look at second-order transient manifestations that occur in time we can perceive – like our FPGA going into thermal runaway or failing to configure.

At the end of 2003, we asked, “Can You Lift the Cow?” We talked about low-speed changes in a high-speed market where significant discontinuities are masked by the distorted passage of human-perceived time. This year, we look at some real-time transients that signal significant forces at work in the way we do electronic design. The big market and technology news in FPGA and structured ASIC for 2005 is plate tectonics in the design tool arena. If our semiconductor seismometers are calibrated correctly, there’s an earthquake coming soon.

On the surface, 2005 seemed like a ho-hum year in programmable logic and structured ASIC. The seasons came and went with few surprising revelations. From a silicon point of view, the major contenders had been announced or at least firmly expected by the end of 2004. FPGA market leaders Xilinx and Altera had already staked their positions in 90nm with their high-end Virtex-4 and Stratix II lines and with their low-cost, high-volume Spartan-3 and Cyclone II families. Structured ASIC players had mostly rolled out their 90nm offerings as well and were working busily to define markets for their relatively new offerings and to build sales and distribution channels that could handle the new, lower NRE business model. [more]

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