Bundling Performance
Lessons from Xilinx ISE 8.1i

Every year, FPGA and Structured ASIC Journal has conducted a survey of design teams that have recently completed projects using FPGAs. We collect and analyze a large volume of responses from readers regarding their completed projects, and we publish and sell a detailed report to companies that have a vested interest in gathering data about the current behaviors of FPGA design teams. This is nothing unusual, as many media companies perform similar research and offer similar studies to their customers. This time, however, we noticed one thing that was unusual. There seems to be a shift that is accelerating in FPGA design. More and more design teams seem to be completing their projects using only tools they obtained directly from their FPGA vendor.

This trend toward one-stop shopping for design tools and silicon is not new. It actually has followed something like a single-cycle sine wave over the past decade or so. Many early FPGAs were simple enough to design with basic schematic capture techniques, and the vendor-provided tools were more than adequate for the limited challenge posed by getting one of those small, seminal programmable logic devices up and running. [more]