FROM
THE EDITOR
This week, we zip up our parkas and trundle out into the cold to examine QuickLogic's new PolarPro FPGA family. PolarPro tests new turf in FPGA land, boasting power efficiency that makes it an excellent choice for battery-powered devices. Its price point is also designed with the mass market in mind, so we're likely to see these little guys showing up in a lot of our music players and other high-performance, power-conscious products.
In our second new feature, Ross Nelson of Mentor Graphics offers us an alternative to "burn and learn" debugging of embedded systems in FPGAs. Even though the technology was developed and proven in SoC ASIC, co-verification has a place in the FPGA design team's toolbox, and can actually save significant verification time when properly applied.
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Kevin
Morris – Editor
FPGA and Structured ASIC Journal
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Chillin’ with QuickLogic
PolarPro Brings FPGAs to BatteryLand
Soft sourceless music flows through the dim-lit scene. The faint smell of incense lingers. The embedded system designer sitting back on the recliner is a relaxed subject, miles from the high-stress world of project schedules and power budgets. The white-robed researcher speaks softly through the microphone, pausing just long enough for the subject’s responses to her word-associations to be heard. “Fire”… “hot”, “Pillow”… “soft”, “Schedule”… “late”, “Water”… “clear”, “Budget”… “over”, “FPGA”… “hot”, “Batteries”… “ASIC”, “Walk”… “run”, “Expensive”… “FPGA”, …
Deep in the system designer’s psyche, the traditional truths of FPGA are fused with non-volatile, metal-to-metal connections. FPGAs are expensive. FPGAs consume too much power. FPGAs and battery-powered consumer devices are complete non-starters. [more]
The Case for Hardware/Software Co-Verification
Can’t I Do That With a Development Board?
by Ross Nelson, Mentor Graphics Corporation
Because development boards are readily available, many FPGA designers make the mistake of relying on them as their primary embedded processor debug and verification environment. Can you get the job done that way? Well, yes you can, but then you can also dig a trench with a teaspoon – if you have enough time.
Large devices allow you to stuff a whole system into the FPGA, but debugging these complex systems with limited visibility – and a one-day turnaround for synthesis plus place and route – can consume weeks of your precious time.
[more]
ANNOUNCEMENTS
Avnet presents in-depth technical training on the latest Xilinx technologies. The Fall 2005 SpeedWay Design Workshop series will be held in 29 cities across North America and will provide practical "how-to" tutorials and labs in a half-day workshop format that will challenge you with a hands-on experience using the newest Xilinx tools and development boards. Space is limited, so sign-up now.
Classes include: "Implementing Hardware Acceleration in Virtex-4 FPGAs," "An Introduction to DSP in Xilinx FPGAs," "An Introduction to EDK and PowerPC" and "Using the UltraController-II."
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