High DRAMa
Making Memory Manageable

A decade ago, memory was not mentioned in the same breath as programmable logic. Each component type had its own role in system design, and different design team members were typically involved with their selection and use. Once FPGAs became serious system components, they began to be paired with memory in switching and network applications. During that period, however, the cost of the FPGAs (sometimes thousands of dollars per device) usually dwarfed the RAM budget. Memory was selected for its speed, and interfacing was a simple matter of putting out an address and latching in some data.

Today, however, the advent of embedded processing applications on FPGAs and a dramatic reduction in device costs have conspired to complicate the memory picture considerably. With high-volume, low-cost applications being developed around FPGA platforms, the appetite for RAM is increasing, and the price of memory is a significant portion of many designs’ total system cost. While FPGA vendors have increased the amount and variety of on-chip memory available, most applications using an embedded processor on an FPGA will still require external memory.

System designers face a challenge in selecting the RAM that will meet system performance goals, is cost effective, and will be available in easy supply for the duration of their product life cycle. On top of that, the memory that meets those requirements is most often a high-performance DRAM with complex and challenging interface constraints. For most applications, it pays to stay with readily available, proven memory solutions.

If you want to optimize price-per-bit, the best strategy is to follow the PC market. “With today’s long product life cycles, it is important to choose a RAM technology that has legs,” says Jim Elliott, Associate Director of DRAM products at Samsung. “You need a product that will be available at a competitive price for the duration of your production cycle. In today’s market, the sweet spot is components with a 256Mbit density.” Price-wise, moving either direction from the sweet spot will result in higher cost-per-bit. A 64Mbit device might be more than ¼ the price of 256, and a 512Mbit device might be more than double. “The farther you go off the beaten path,” Elliott continues, “the price goes up and the supply and availability go down. The point moves every one and a half to two years, so you should consider your launch date and choose a density accordingly.” [more]

Overview of Memory Types and DDR Interface Design Implementation
by Laxmi Vishwanathan, Dan Schaffer, Jock Tomlinson, Lattice Semiconductor Corp.

Over the past several years the electronics market and, more specifically, the memory market has undergone significant change. Prior to the electronics industry downturn in 2000, electronic system designers were less concerned with the cost of the components going into their next design, and more concerned with the raw, maximum performance they could achieve.

Today, increasing competition and decreasing profit margins have forced system designers to reduce next generation product cost while maintaining, or even increasing, system performance. One industry segment that has experienced substantial growth as a result of this transition is DRAM memory, particularly Double Data Rate (DDR) SDRAM memory.

DDR Memory first came on the scene as a high performance, low-cost memory solution targeted primarily at the personal computer and other cost sensitive consumer markets. More recently, due to the economic pressures squeezing the entire electronics industry, non-consumer products have also begun to incorporate DDR memory (Figure 1).

DDR is an evolutionary memory technology based on SDRAM. DDR SDRAM access is twice as fast as SDRAM, because DDR data transfers occur on both edges of the clock, compared to SDRAM, which transfers data only on the rising edge of a clock. Consequently, DDR can transfer data at up to 2133MB/s. DDR also consumes much less power than conventional SDRAM, with an operational Vcc of just 2.5Vdc instead of 3.3Vdc for SDRAM. [more]