Remember engineering school? It was a time when life was simple, learning was fun, and a pencil line on a schematic meant that a logic input was “connected” to a corresponding output. Remember when you could design the pinout for your FPGA pretty much however you wanted, then throw it over the wall to some unknown engineer in the board team who, with equal disregard for the perilous potential of physics, would unceremoniously jam it onto a PCB with the idea that any old piece of metal coming into contact with the pins was probably good enough?

Well, if you’re out of engineering school now and off in the world of VHDL and Verilog designing digital delights for the new millennium, you probably were the type that didn’t prefer classes with words like “noise margins”, “impedance-matching”, and “transmission line”. If you had friends who did pay attention in those classes, however, now might be a good time to give them a call. You see, when your FPGA’s I/O pins started switching faster than about 40MHz, you earned an unexpected bonus. Any trace longer than one or two feet now includes a free antenna and transmission line. Now, in addition to connecting your inputs to your outputs, your PCB traces will do all sorts of new tricks you never imagined. Welcome to the world of ground bounce, ringing, and cross talk.

If you find some of these tricks to be less than amusing, you might need to roll up your sleeves, erase that pencil line, and replace it with a daunting network of inductors, resistors, capacitors, antennae, and transformers. These components have secretly been lurking there all these years just waiting for the chance to jump up and show you their stuff.

If you’re running at frequencies of 300MHz or more (which many of today’s I/O standards are) most all of your traces are behaving as transmission lines and antennas. Fortunately, we in the FPGA world are not the first to encounter this problem. Generations of brave high-frequency designers have come before us, and we can learn from their wisdom. The FPGA vendors want your design to work too, so they’ve done a lot of the worrying for you. Differential signal pairs such as those used in most serial I/O standards go a long way toward improving signal integrity. They solve a number of issues right out of the chute (although they bring in a few new challenges of their own). Let’s take a look at a few of the signal integrity (SI) related effects and walk through recommended design practices for getting around them. [more]

Fast and Accurate Multi-GigaHertz Modeling Techniques
Donald Telian, Cadence Design Systems, Inc.

As differential signal frequencies rise, Multi-GigaHertz (MGH) system simulation becomes imperative. This is particularly true as systems and packages become harder to probe, and signals become perceptible only to equalization embedded within silicon. Yet silicon-package-board modeling is at a crossroads; IBIS can’t handle pre-emphasis and transistor models are too slow to simulate enough bits. Has this issue affected your design team?

New techniques are now available for your MGH simulations that are probably simpler than you think. In this article we’ll look at why these solutions are important and explain some basic understandings you’ll need to apply them. Read on, and you’ll discover that your next step forward is only a couple mouse clicks away. [more]