FPGA Journal Update

a techfocus media publication :: January 27, 2004 :: volume II, no. 4

FROM THE EDITOR

There are now FPGAs on Mars! Did you see the press release? It turns out there are a lot more FPGAs showing up here on Earth as well. If you’re designing some of them, you’ll need to pick the best synthesis tool for the job. This week’s new feature article is a guide to running your own benchmark and interpreting the results. It’s trickier than you think.

Things are fast-and-furious at FPGA Journal right now, so stay tuned. The next few weeks will see some exciting events as our editorial calendar has begun to overflow with innovations, issues, and announcements.

Thanks for reading!

If there's anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com

Kevin Morris – Editor
FPGA and Programmable Logic Journal

Synthesis Shootout - Benchmarking synthesis tools

Did you spend hours as a kid racing your Hot Wheels cars against each other on two parallel tracks, doing careful comparisons and statistical analyses, trying to rank your collection from fastest to slowest so you would be ready to go when any unsuspecting neighbor kid brought over their collection? If so, you should march down and volunteer to coordinate your team’s FPGA synthesis benchmarking project.

The two steps of the FPGA design flow that have the most impact on performance (assuming your micro-architectural design is fixed) are logic synthesis and placement. These two steps, whether done separately (as in a conventional flow) or together (as in a physical synthesis flow), can affect your design’s speed by at least a factor of two and the size of your design by as much as 30-50%. If you’re using any significant volume of FPGAs, the cost implications of the difference in one or two speed grades and one or two device sizes are enormous. If you’re pushing the limits of your FPGA family, it can mean the difference between delivering a working device and failing.

It makes sense, then, that you’d want to be careful in selecting your FPGA synthesis and placement tools. While placement options are generally limited by the FPGA vendor you choose, there are a number of logic synthesis and physical synthesis tools available, and selecting the correct one can be a formidable task. Here is our guide to running your own benchmark, avoiding common pitfalls, and interpreting the results. [more]

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