a techfocus media publication :: December 30, 2003 :: volume I, no. 14

FROM THE EDITOR

Happy New Year from FPGA and Programmable Logic Journal!

Here at the end of 2003, we pause to review the status of the industry as we charge headlong into the perils, progress, and politics of programmable logic in 2004. This also marks the end of our first quarter of publication, and we thank you for your interest, comments, and patronage. You have helped make our inaugural volume successful and we look forward to continuing to serve you in 2004.

Thanks for reading!

If there's anything we can do to make our publications more useful to you, please let us know at: comments@fpgajournal.com

Kevin Morris – Editor
FPGA and Programmable Logic Journal



Visit Techfocus Media

CURRENT FEATURE ARTICLES

Can You Lift the Cow?
FPGA at the end of 2003
Stigmata

Does your business card still say ASIC Designer?
Databahn

High-speed serial I/O for programmable logic
Going Serial with your Backplane
by Jock Tomlinson, Lattice Semiconductor
Design-in Kits Simplify Serial PCB
by Brad Griffin, Cadence Design Systems
Patently Unobvious

How the patent system works for and against technology
Embedded Dilemma
Platforms, soft-cores, RTOS, oh my!
Bringing the Processor into the FPGA
by Rob Irwin, Altium Limited
Language Barrier
How will the next generation of FPGAs be designed?

Can You Lift the Cow? FPGA at the end of 2003.

There is a myth about a rancher who decides to build his strength by lifting a calf. From the day the calf is born, the rancher goes each day into the barn and raises the calf over his head. His reasoning is that if he lifted the calf yesterday, he should be able to lift the same animal today. Eventually, the rancher figures, the calf will be full-grown and the rancher will thus be strong enough to lift an adult cow.

Obviously, this reasoning is flawed. The day of reckoning will come when, despite the previous days’ successes, the rancher will no longer be able to lift the calf. The change would come gradually and the actual day of failure would be difficult to predict accurately, but it would be inevitable nonetheless. So it is with metrics that change gradually but continuously over a long period of time. Even though there is no apparent discontinuity, the day invariably comes when the old way is out and the new way is in.

In his paper published on April 19, 1965, Gordon Moore predicted that the number of transistors on a chip would approximately double every two years. Almost 40 years later, that revolutionary prediction remains remarkably close to reality. Although Mr. Moore’s forecast shows no convincing signs of weakness yet, there have been many days of reckoning along the way. SSI gave way to MSI, then LSI and VLSI. Semi-custom devices replaced standard parts for many applications. Gate arrays boomed onto the scene, almost went extinct during the cell-based ASIC age, then recently re-emerged in disguise as “structured ASIC” devices. Programmable logic arrived and grew explosively into one of the dominant implementation technologies available today. [more]

 


You're receiving this newsletter because you subscribed at our website www.fpgajournal.com.
If at any time, you would like to unsubscribe, send e-mail to unsubscribe@fpgajournal.com. (But we hope you don't.)
If you have any questions or comments, send them to comments@fpgajournal.com.

All material copyright © 2003 techfocus media, inc. All rights reserved.
Privacy Statement