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Did
your last circuit board look like a college marching band of DSP
processors? Could you use it to heat your basement? Maybe you’ve
been using one discrete DSP processor paired with an FPGA or ASSP
in your embedded system design? Maybe it’s time to consider
implementing your next digital signal processing algorithm in programmable
logic.
Before
you start sending those comments about how DSP processors are cheaper,
lower power, and easier to design than a typical FPGA, stop and
re-do the math. Brian Jentz, DSP marketing manager for Altera, says
that designers are switching to programmable logic for DSP applications
and saving cost, power, and space on the circuit board compared
with traditional DSP processors. “You have to look from a
system design perspective,” says Xilinx’s Narinder Lall,
Sr. Marketing Manager for DSP solutions. “Both cost and power
per channel are dramatically lower with an FPGA implementation.”
[more]
The
latest digital signal processing-enhanced FPGAs boast huge gate
counts, ample amounts of hard-wired SRAM, and an abundance of hard-wired
multipliers. These attributes hint at the potential for phenomenal
performance in digital signal processing applications. But experienced
engineers know that the difference between potential performance
and actual performance can be huge.
Experienced
engineers also know to view the performance claims of chip vendors
with skepticism. This cynicism definitely holds true when evaluating
the digital signal processing performance of FPGAs. For example,
FPGA vendors sometimes quote the digital signal processing performance
of their chips in terms of MACs (multiply-accumulates) per second.
On the surface, this approach seems reasonable; after all, many
digital signal processing algorithms make heavy use of MACs, and
DSP vendors are also fond of quoting processor performance in terms
of MACs per second.
[more]
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