Source:Lattice Semiconductor
January 29, 2008

Lattice and Praesum Communications Deliver Low-Cost Serial RapidIO Solutions

-- Serial RapidIO Endpoint Solution for LatticeECP2M FPGAs Enables
Low-Cost RapidIO Connectivity for Wireless Infrastructure and Other Markets --

HILLSBORO, OR - JANUARY 29, 2008 - Lattice Semiconductor (NASDAQ: LSCC) today announced that Praesum Communications, a switching and bridging solutions provider for networking and telecommunications applications, has optimized its high-performance Serial RapidIO(r) Interface Endpoint solution for the LatticeECP2M(tm) family of low-cost 90nm FPGAs, which feature integrated SERDES I/O. Moreover, Praesum has joined Lattice's ispLeverCORE(tm) Connections IP partner program. Lattice and Praesum plan to develop and deliver complete system solutions targeting digital signal processing, embedded computing, military/aerospace and communications infrastructure for their mutual customers who require high-performance Serial RapidIO connectivity as well as low-cost, low power, and tight form-factors.

The Praesum core supports RapidIO 1x connectivity at data rates up to 3.125 Gbps. Depending upon the chosen feature set, the RapidIO 1.3 compliant core consumes 50 - 70% of an LFE2M20, the smallest member of the LatticeECP2M family. This makes available significant device resources for implementing customer applications like bridging to data plane interfaces, such as CPRI, or control plane interfaces, such as PCI Express. In spite of its small footprint, the core supports advanced features such as the RapidIO Error Management Extensions.

"Our partnership with Praesum is yet another example of Lattice's strategy to deliver 'More of the Best' solutions for high-speed serial protocols with our industry-leading LatticeECP2M low-cost SERDES technology," said Stan Kopec, Lattice corporate vice president of marketing. "Lattice is pleased that Praesum, an industry pioneer in providing Serial RapidIO solutions for FPGAs, recognizes the advantages in power, size, scale and value that the LatticeECP2M brings to this applications space. Praesum's technology has been proven with established leaders in the Serial RapidIO market and with industry-leading processors, embedded systems and communications switches. We believe the Serial RapidIO user community will be quite receptive to the value proposition the LatticeECP2M family offers compared to traditional and more expensive high-end FPGA and ASSP devices."

"Praesum sees significant opportunity for its LatticeECP2M-based Serial RapidIO solutions in the wireless systems infrastructure market. The LatticeECP2M's unique combination of high-speed SERDES for multiple protocols, miserly power consumption, small scale packaging and outstanding value lends itself well to current Serial RapidIO design trends, especially where multiple protocols are involved," said Kent Dahlgren, president and CTO of Praesum Communications. "When combined with our RapidIO End Point IP, the LatticeECP2M devices significantly reduce the cost to connect application specific functions to a RapidIO fabric."

About the Praesum Serial RapidIO Endpoint Solution
The RapidIO 1x LP-Serial End-Point Core is available from Praesum Communications now. A project license for the core is priced at $20,000 USD. A fully functional evaluation version of the core is available for the LatticeECP2M PCI Express x4 Evaluation Board.

About LatticeECP2M FPGAs
LatticeECP2M FPGAs are an innovative response to the broad range of customers who have been clamoring for low-cost SERDES capability for chip-to-chip and small form-factor backplane applications. The LatticeECP2M family maintains all of the compelling features of the 90nm LatticeECP2(tm) family that are required for high-volume, cost-sensitive applications, while dramatically increasing memory capacity (ranging from 1.2 Mbits to 5.3 Mbits) and DSP resources (ranging from 24 to 168 multipliers). The SERDES integrated into the LatticeECP2M devices has been engineered as a quad-based architecture with 1 to 4 quads, depending on the size of the device. Each quad features four SERDES channels (four complete TX and RX channels), with each channel featuring power consumption as low as 100mW and supporting data rates from 270 Mbps to 3.125 Gbps. A flexible PCS layer that includes 8b/10b encoding, an Ethernet link state machine and rate matching circuitry also are integrated into the devices. The SERDES/PCS combination is designed to support today's most common packet-based protocols, including PCI Express, Gigabit Ethernet, Serial RapidIO and wireless interface standards (OBSAI and CPRI).

About Praesum
Praesum Communications develops and deploys smart switching technologies in the form of IP cores, boards and system level products. Praesum believes that the addition of more intelligence to switching products is the key to managing network resources - bandwidth, applications, users and business relationships that justified the network in the first place. The company was founded in January 2000 and has its headquarters in Petaluma, Calif. For more information, visit the Praesum web site at www.praesum.com

About Lattice Semiconductor
Lattice Semiconductor Corporation provides the industry's broadest range of Programmable Logic Devices (PLD), including Field Programmable Gate Arrays (FPGA), Complex Programmable Logic Devices (CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products.
Lattice continues to deliver "More of the Best" to its customers with comprehensive solutions for system design, including an unequaled portfolio of high performance, non-volatile and low cost FPGAs.

Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in communications, computing, industrial, consumer, automotive, medical and military end markets. For more information, visit http://www.latticesemi.com

Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements, including references to performance data and the availability of Lattice's SC products, involve risks and uncertainties including market acceptance and demand for our new products, our dependencies on our third party silicon suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements.
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Lattice Semiconductor Corporation, Lattice (& design), L (& design), LatticeECP2M, LatticeECP2, ispLeverCORE and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.

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