Source: DATE
January 23, 2008

DATE 08 Conference highlights

London, January 23, 2008 – For the 11th edition of the DATE conference the Technical Programme Committee has received a record number of paper submissions in a wide variety of subjects, particularly in the area of Embedded Systems and Software, turning DATE into the most important conference on system design from software to hardware.

The product of these submissions is an exciting technical programme, which is now available in print and online at www.date-conference.com Early registration discounts for the DATE Conference expire on February 20th 2008.

The DATE'08 conference offers a strong strategic programme of Executive Management Sessions.

These sessions will address three areas of interest to the global management teams of semiconductor and systems OEMs. Topics will range across current semiconductor and system design trends, looking specifically at design at the system-level, through the status of moves to 45nm semiconductor technologies, and on to the overall prospects for the semiconductor industry at large:

· Unifying or Overrated: A System Level Design Strategy.

Significant momentum is building around ESL (Electronic System Level) design, but is the concept living up to much hyped expectations? Is there even a common definition for ESL?

Moderator: Robert Hum, VP & General Manager, Verification and Test Division, Mentor Graphics

Executive Panellists:

Wolfgang Ecker, Principal Engineer, Infineon Technologies, Germany

Rolf Ernst, Professor, TU Braunschweig, Germany

Joachim Kunkel, Vice President and General Manager, Synopsys, USA

Peter Nord, Director of Design, Ericsson, Sweden

Ken Kanofsky, Marketing Director, Signal Processing and Comms., The MathWorks, UK

Misha Burich, Senior VP of Research & Development, Altera, USA

· From IDM to “Fab-Lite”: What Changes in your EDA Strategy?

Addressing the coming challenges in EDA as companies change from quite "vertically integrated" IC manufacturers to a strategy of reliance on significant more sharing of semiconductor process development.

Moderator: Richard Wallace, VP, Editorial Director, CMP Technology and Editor-in-Chief, EE Times

Executive Panellists:

John Chilton, Senior VP, Synopsys, USA

Barry Dennington, Senior VP, Corp Innovation & Technology, NXP Semiconductors, Netherlands

Lucio Lanza, CEO, Lanza Ventures (ARM), USA

Philippe Magarshack, Vice President R&D, ST Microelectronics, France

Ivo Bolsens, VP and Chief Technology Officer, Xilinx, USA

· The Perils of 45nm: A Report on the Move.

An informal "progress report" on the ongoing technology move to designs at 45 nm - Contrasted to the predictions of only a few years ago, how is the move really going? Issues were raised about the need for new design techniques, such as the use of statistical methods and increased manufacturing concerns in order to achieve yields.

Moderator: T. W. Williams, Engineering Fellow, Synopsys

Executive Panellists:

Jean-Pierre Geronimi, Director Technology, ST Microelectronics, France

Anil Jain, Vice President of IC Engineering, Cavium Networks, USA

Rudy Lauwereins, Vice President, IMEC, Belgium

Yoshifumi Okamoto, Director Design Centers, Matsushita/Panasonic, Japan

Ted Vucurevich, Chief Technical Officer, Cadence Design Systems, USA

In addition to the Executive Management Sessions, Special Technical Sessions run across all three days of the DATE’08 event. These Special Sessions consist of a Panel Session, Hot Topics, Tutorials and Invited Industrial Sessions.

The Technical Panel Session will provide a forum for the controversial discussion of how the semiconductor industry will cope with the issues ahead for design and manufacturing in advanced technologies.

· PANEL - Caution Ahead: The Road to Design and Manufacturing at 32nm and 22nm

At 32 and 22 nm, which manufacturing technology changes will be so revolutionary as to cause upheavals in the semiconductor supply chain and on design practices? How will designers “sign off” on a design at 32 nm?

Moderator: P Wintermayr, Editor, Elektronik.net, DE

Panellists:

Rob Aitken, Senior Architect, Product Technology, ARM, USA

Rudy Lauwereins, VP, Nomadic Embedded Systems, IMEC, Belgium

J. Tracy Weed, Director, Manufacturing Products, Synopsys, USA

Volker Kiefer. VP, CAD and Software Development, Qimonda, Germany

J. Hartmann, Crolles2 Alliance Director, ST Microelectronics, France

Hot Topic sessions provide an exciting technical overview and insight into emerging new topics, presented by leading experts in the field. They present their view on the relevant issues and their importance for research and development. The Hot topics at Date 08 will be:

· Quantitative Evaluation for Embedded Systems Design.

· Test Challenges for Low Power Devices.

· Quantitative Productivity Measurement in IC Design.

· Analogue: How to Survive in the Era of Nano CMOS.

· 3D Integration or How to Scale in the 21st Century.

The Embedded tutorials have been designed to give an insight into current topics starting from an introductory base. The topics for the DATE 08 Embedded tutorials are:

· Software for Wireless Networked Embedded Systems.

· ARTEMIS and ENIAC Joint Undertakings: A new approach to conduct research in Europe

Designed to be of great general interest, two Invited Industrial Session have been organised:

Industrial System Designs in Transportation and Information Technologies.
o Tailored solutions for safety-installations in a project for trans-European rail traffic

W. Fuss, Thales Rail Signalling Solutions GmbH, AT

o On the verification of high-order constraint Compliance in IC-design

J. Freuer, G. Jerke and J. Gerlach, Robert Bosch GmbH, DE; W. Nebel, Oldenburg U, DE

o Industrial IP integration flows based on IP-xact standards

W. Kruijtzer, P. van der Wolf, E. de Kock & J. Stuyt, NXP Semiconductors, NL; W. Ecker & A Mayer, Infineon Technologies, DE; S. Hustin & S de Paoli, STMicroelectronics, FR

System Designs in Information Technologies.
o Concurrent design and handover of SoC subsystems for enhanced reuse and flow automation

M. Strik, NXP Semiconductors, NL; A. Gonier, Mentor Graphics, FR

o Cooperative safety: combination of multiple technologies

P. Capozio, M Duncan, E Merli, M Siti and R Panazzi, STMicroelectronics, IT

o System performance optimization methodology for Infineon 32-bit automotive microcontroller

A. Mayer and F Hellwig, Infineon Technologies, DE