Source: GiDEL
January 29, 2007

GiDEL Releases The Fastest, Scalable SOC/ASIC Verification System Built On Reconfigurable Technology

New System Targets SoC Development Projects of 5 to 100+Million Gates

January 29, 2007. Santa Clara, California. GiDEL, a leader in reconfigurable systems, today announced that it has released the PROC_SoC™ Verification System. The PROC_SoC is designed to debug and verify SoC designs of diverse styles from 5 to 100+ million gates in size using one or more reconfigurable PROC30M™ SoC Verification modules. The PROC_SoC system sets a new standard for verification system performance, price/capacity, interconnect flexibility, and ease-of-use. The system is architected and designed to operate at system clock speeds up to 300MHz.

Unique, scalable hardware system is designed for 5 to 100+ million ASIC gates.
Scalable capacity exceeding 100 million ASIC gates can be delivered with multiple PROC30M modules. Each PROC30M module includes an enclosed card cage with up to ten reconfigurable PROC3M elements. A PROC30M module has a nominal capacity of 30 million ASIC gates, 3 million gates for each reconfigurable element. Each element has two, interconnected, high speed Altera Stratix II EP2S180 FPGAs and 128 MB of onboard DRAM, or 1.28GB for each full PROC30M module. Configurations begin with two elements, or 6 million ASIC gates of nominal capacity.

“The PROC_SoC system meets the increasing verification needs of large SoC designs and system software development.” commented Reuven Weintraub, GiDEL President and CTO. “The innovative PROC_SoC interconnect design, along with GiDEL's vast experience of designing machine vision and other reconfigurable hardware accelerators yield this fastest and easy-to-use scalable system. By porting our superior design and debug tools to the PROC_SoC system, implementation of a powerful system-level debug and verification environment is very straightforward “

Fast, efficient implementation shortens time to debug.
The PROC_SoC system includes a comprehensive suite of best in breed software tools for implementing and debugging designs. Every PROC30M module includes the PROC Developer’s Kit. The Kit consists of a suite of tools for the efficient mapping of chip designs into PROC30M FPGAs and for debugging designs. The PROCWizard Software manages these processes and integrates the files generated by best of breed tools for partitioning, design mapping, synthesis and place and route. PROCWizard also generates a unique application driver. For each user's application, it will generate a dedicated driver which is extremely easy to use with optimized performance. This enables fast setup and running of comprehensive test benches from a host across a network to the verification system.

Designed for maximum performance and interconnect flexibility.
The unique interconnect topology of the PROC_SoC system allows any programmable device to directly connect with large numbers of pins to any other programmable device in the entire system. This includes connecting to FPGAs on the same reconfigurable element, to FPGAs on other elements in the same PROC30M module, or to FPGAs on any other PROC30M module in the PROC_SoC system or to user’s IOs.

There are 230 FPGA-to-FPGA IO connections on each PROC3M element. Users define the additional appropriate flexible interconnect between programmable devices in bundles of 118 user pins, with up to six such interconnect structures per FPGA. Any topology of such interconnects is possible to match the design style of the device. A configured system is thus a sea of programmable devices interconnected through one or more “user designated busses” of 118 pins. The system is optimized for speed eliminating the extra delays inherent within routing switches, and hops through FPGAs and other connection technologies used in legacy systems. With up to 14,160 user accessible I/Os per full PROC30M module, there are plenty of I/Os to also interface to target systems for high speed, in-circuit verification.

PROC_SoC Finds and Helps Resolve More Bugs Faster.
With the PROC_SoC System, tests will run the fastest of all comparable systems, and those hard to reach bugs are found quicker. The PROC Developer’s Kit provides various methods of capturing data and debugging designs. To accommodate the testing needs of different teams at different phases of their projects, debugging can use both distributed memories within the FPGAs and onboard memories to capture signal data. The PROCWizard debug GUI enables direct access to the design IOs and running of tests. Scripts are automatically generated of test processes for replay. The configurable multi-port on-board memories can be easily set up to capture data from thousands of probe points during testing with virtually unlimited depth. Also, with the supplied SignalTap software, probes can be set for more visibility using internal FPGA memories. This combination practically eliminates the need to recompile the FPGAs for visibility.

Sharable, scalable capacity
Teams only purchase the capacity they require, and add more capacity as needed. The verification elements fit into a PROC30M module card cage within a cabinet that is slightly larger than a tower PC. Multiple PROC30M modules can be used for extremely large designs. Further, multiple users can independently access different reconfigurable elements in the same PROC30M module for smaller designs and block regression tests. Such use can be for independent design block verification within a project, or for completely independent projects. Fast/Gigabit networking interfaces to the PROC30M modules dynamically allow the system to be directly linked to various computers for running the test benches and for very fast device programming.

The PROC_SoC System leverages the newest, largest, fastest FPGAs from Altera in an architecture that is ideal for verifying high-speed SoC designs at speeds up to 300 MHz.
The system is complemented by a suite of application specific PROC system daughter boards for direct system interfaces like DVI, PHY/Ethernet, etc.,. Specifications are provided for design teams to also build their own proprietary daughter boards to mount in the PROC30M System.

Software Debugging.
To enable software debugging early in the development process, the ability to dynamically allocate the systems and the reasonable pricing of the fully configured systems makes them ideal for supplying multiple, replicate systems for software development teams to begin verification of software on emulated hardware prior to silicon availability. As software is developed, it can be exercised running at real world hardware speeds savings months of development time. In many cases that by itself will put the SoC or the user's system in production earlier.

PROC_SoC System delivery times are 4-6 weeks ARO. Introductory prices start at about $100,000.

About GiDEL.

GiDEL Ltd. is a successful, profitable and innovative company which was founded in 1993. GiDEL has become one of the market leaders as a company that continuously provides cutting-edge reconfigurable technology utilizing FPGAs. GiDEL sees it's customers as partners and uses its vast experience at the project-level and FPGA design to focus on its customers' projects’ success.

GiDEL currently has operations in North America, Japan, Europe, and Asia. Customers in semiconductor, consumer product, communications, machine vision, medical imaging, and military/aerospace markets purchase the PROC family of reconfigurable PROCessors (1) for SoC and ASIC verification, (2) as COTS (Commercial Off-The-Shelf) acquisition and accelerator boards, and (3) to validate complex algorithms. For more information, contact GiDEL in North America at 408-969-0389, or worldwide at +972 4 610 2505, or on the web at www.gidel.com.
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GiDEL, PROC_SoC, PROCWizard, PROC30M, PROCMultiPort, PROCMegaFIFO, and PROCMegaDelay are registered trademarks and trademarks of GiDEL Ltd. All other names, registered trademarks and trademarks are the property of their respective owners.