BusinessWire
December 18, 2006 07:00 AM Pacific Time

EVE Survey of DAC Attendees Finds Most Satisfied with Verification Environment

60 Percent Employ Hardware/Software Co-Verification, 55 Percent Use or Plan to Use Hardware-Assisted Verification

SAN JOSE, Calif.--(BUSINESS WIRE)--In a survey of Design Automation Conference (DAC) attendees taken during the conference in July, EVE found that 60 percent of respondents were satisfied with their current verification environment.

EVE, known for its ZeBu (Zero Bugs) hardware-assisted verification platform, conducted this survey to better understand electronics design trends and what tools are needed to make design teams more effective. Of 617 surveys collected during the four-day conference, 477 were used to compile the survey.

Among the findings, close to 60 percent of respondents said that their design team performed hardware/software co-verification, and 55 percent use or plan to use hardware-assisted verification. The survey showed trends toward bigger designs –– 72 percent noted that their designers were larger than two million gates –– and a growing need for better performance or software development, leading to a strong desire for hardware-assisted verification solutions.

“This survey has been incredibly useful,” says Lauro Rizzatti, general manager of EVE-USA. “It confirmed our theory that only companies offering fast solutions at a low price with a decent setup time, automated compilation flow and hardware debugging will thrive. The others will stagnate in the emulation market or be replaced by newcomers in the prototyping market where it is well known that the barriers to entry are quite low.”

Other findings: Assertion-based design is used by 49 percent of respondents in the verification flow, with cycle-based simulation weighing in at 27 percent and transaction-based verification at 24 percent.

As for hardware/software co-design, 31 percent of respondents are using emulation, 29 percent employ field programmable gate array (FPGA) prototyping, 15 percent have chosen virtual prototyping, 13 percent use electronic system level (ESL) tools and 12 percent are working with instruction set simulation (ISS).

Respondents included front- and back-end designers, front- and back-end verification engineers and system designers. Other respondents listed their job functions as electronic design automation (EDA) management, software engineers, sales and marketing. They are designers of application specific integrated circuits (ASICs) (42 percent), system on chips (SoCs) (26 percent), intellectual property (IP) (13 percent) and custom ICs (12 percent).

Applications ranged from consumer electronics (23 percent) and communications and wireless (16 percent each), processor (11 percent), followed by networking, computers and peripherals, multimedia, military/defense electronics, aerospace and Homeland Security, all under 10 percent of respondents.

The largest percentage of respondents noted that their chips were less than two-million gates (28 percent), while 25 percent wrote that their chips were in the two- to five-million gate range. Others said that their designs were in the five- to 10-million gate range (22 percent), 15 percent wrote that their designs ranged from 10-50 million gates and 10 percent said that their chips were larger than 50-million gates.

While most respondents listed execution speed as needing the most improvement in the verification environment, ease of use, setup and compile speed also need improvement, as does coverage, price and reusability.

Within the verification flow, the survey found that 25 percent of respondents believe that block-level testing needs the most improvement, followed by software integration at 19 percent. Hardware regression testing and block-level regression testing weighed in at 18 and 17 percent, respectively. Other areas that need improvement include software applications, software drivers and graphical user interface (GUI)/utilities development, and real-time operating systems (RTOS).

For more details on EVE and ZeBu, or to receive a copy of the survey analysis, visit: http://www.eve-usa.com. Or, contact Lauro Rizzatt at (408) 881-0440 or via email at lauro@eve-usa.com.

About EVE

EVE offers the fastest verification and most cycles per dollar by combining the best aspects of traditional emulation and rapid prototyping systems into a single, unified environment for ASIC and SoC debugging, and embedded software validation. Its headquarters in the United States is San Jose, Calif. Telephone: (408) 881-0440. Fax: (408) 904-5800. Its corporate headquarters is located in Palaiseau, France. Telephone: (33) 1 64.53.27.30. Fax: (33) 1 64.53.27.40. Email: info@eve-usa.com. Website: http://www.eve-usa.com.