HOME :: JOB LISTINGS :: WEBCASTS :: ARCHIVES :: MEDIA KIT :: SUBSCRIBE :: FORUMS


PR Newswire
Sep 22, 2006 07:30 ET

Xilinx Demonstrates Latest Programmable Solutions for Aerospace and Defense at MAPLD 2006

What: Xilinx Aerospace and Defense Solutions at MAPLD 2006

Where: Reagan Building and International Trade Center Washington, D.C., Booth #3

When: September 26-28, 2006

SAN JOSE, Calif., Sept. 22 /PRNewswire/ -- Xilinx, Inc. (NASDAQ:XLNX) today announced that its industry-leading programmable logic solutions designed specifically for the aerospace and defense market will be showcased at the ninth annual MAPLD Conference, September 26-28, 2006 in Washington, D.C. Xilinx will feature its newly revised TMRTool, designed to address the special needs of FPGAs in high-radiation environments. Xilinx will also demonstrate its partial reconfiguration capabilities based on the Virtex(TM) QPRO(TM) device. Partial reconfiguration allows customers to save on device count, size, power and cost by allowing predefined portions of an FPGA to be reconfigured while the remainder of the device continues to operate.

Xilinx Booth Demonstrations:

-- New Revision of TMRTool: Demonstration of Xilinx TMRTool -- provides
redundancy schemes for mitigating the effects of radiation in space
electronics. More information on the Xilinx TMRTool can be found at:
http://www.xilinx.com/ise/optional_prod/tmrtool.htm .

-- Partial Reconfiguration: Demonstration of Xilinx Virtex architecture
allowing design modules to be swapped on-the-fly using partial
reconfiguration methodology.

Xilinx Keynotes, Panels and Technical Papers:

-- "Activation Energy Determination of a Space Qualified 350nm Flash
Technology" Joe Fabula of Xilinx

-- "Continued Exploration of the Neutron Single Event Upset Sensitivity of
Current Generations (90nm and 65nm) of Field Programmable Gate Arrays"
Joe Fabula of Xilinx

-- "Some Guidelines on the Hardwar/Software Tradeoffs in Robust
FPGA/Embedded Processor Designs" Greg Miller of Xilinx

-- "SEU Error Detection and Correction Techniques for the Xilinx Virtex-4
FPGA" Wei Chen Tseng of Xilinx

-- "Design Considerations for Implementing Triple Module Redundancy in
Xilinx FPGAs" Wei Chen Tseng of Xilinx

-- "An Upset-Mitigated FPGA-Based High Performance Compute Platform for
Space Applications" Gary Swift of JPL

-- "An SEU-Mitigated FPGA-Based Flash Memory Controller for Space
Applications" Gregory Allen of JPL

About Xilinx

Xilinx is the worldwide leader in complete programmable logic solutions. For more information, visit www.xilinx.com .

 

 

 

 

 

All material on this site copyright © 2006 techfocus media, inc. All rights reserved.
FPGA and Structured ASIC Journal
Privacy Statement