PR Newswire
Jan 23, 2006 08:00 ET

Learn Why Altera's High-Speed Solutions Are Best-in-Class at High-Speed Design Seminar and DesignCon 2006

SAN JOSE, Calif., Jan. 23 /PRNewswire-FirstCall/ -- What:

Altera Corporation (NASDAQ:ALTR) is hosting its third High-Speed
Design Seminar on February 10, 2006, aimed at educating designers
on the latest methods and solutions for multi-Gigabit serial
interconnect design. On February 6-9, Altera will also be
exhibiting in booth 224 at this year's DesignCon conference in San
Jose, California.

Altera's High-Speed Design seminar will cover key aspects of
high-speed serial interconnect design, including the latest trends
and issues in signal integrity, analyzing multi-Gigabit backplane
characteristics and applying s-parameter and jitter measurement
using the latest test equipment. Industry authority Dr. Eric
Bogatin will deliver the keynote presentation. Over his 24-year
career, Dr. Bogatin has written four books and published more than
200 technical articles on signal integrity and interconnect
design. Leading industry experts from Mentor Graphics, Molex,
Tektronix and Altera will also give technical presentations on
high-speed design.

At DesignCon 2006, Altera will showcase its new Stratix(R) II GX
technology, demonstrating how its low-power transceivers provide
the industry's best signal integrity. Visitors to the booth can
also see Altera's "Board of Truth," which compares the signal
integrity performance of Altera's Stratix II product to the
nearest competitor. Other highlights include the unique
HardCopy(R) II design flow for structured ASICs.

When and Where:

High-Speed Design Seminar
February 10, 2006

Altera Corporation Headquarters
101 Innovation Drive
San Jose, Calif. 95134

-- Keynote Presentation -- Trends and Issues in Signal Integrity,
presented by Dr. Eric Bogatin
-- High-Speed Transceivers, presented by Altera Corporation
-- Parallel I/O Signal Integrity, presented by Altera Corporation
-- High-Speed Backplanes, presented by Molex
-- High-Speed Board Design EDA, presented by Mentor Graphics
-- S-Parameter Measurement Methods, presented by Tektronix
-- Jitter and Eye-Quality Measurement Methods, presented by
Tektronix
-- Signal Integrity Tools, presented by Altera Corporation

DesignCon 2006
February 6-9, 2006

Santa Clara Convention Center
Booth 224
Santa Clara, Calif.

-- Paper Presentation: Functional Verification of a Multi-Gigabit
Transceiver IP in a FPGA
-- Paper Presentation: Fast Time-Domain Simulation of 200+ Port
S-Parameter Package Models
-- Paper Presentation: Analysis of FPGA Simultaneous Switching
Noise in Three Domains: Time, Frequency, and Spectrum
-- Paper Presentation: Accurate Calibration and Measurement of a
Non-Insertable Fixture in FPGA and ASIC Device Characterization

To register for the High-Speed Seminar, please visit
www.altera.com/highspeed.

For more information on Altera at DesignCon 2006, please visit
www.altera.com/designcon06.

NOTE: Altera, The Programmable Solutions Company, the stylized Altera
logo, specific device designations and all other words that are identified
as trademarks and/or service marks are, unless noted otherwise, the
trademarks and service marks of Altera Corporation in the U.S. and other
countries. All other product or service names are the property of their
respective holder.

Source: Altera Corporation

Web site: http://www.altera.com/