BusinessWire
November 14, 2005 09:33 AM US Pacific Timezone

Summit Design's Visual Elite Further Strengthens and Links Design Environment for HDL and ESL Designers; New Capabilities Simplify HDL Design Flows and ESL Adoption

LOS ALTOS, Calif.--(BUSINESS WIRE)--Nov. 14, 2005--Summit Design, Inc., a leading provider of electronic system-level (ESL) and hardware description language (HDL) design solutions, today announced that the Visual Elite(TM) design platform now incorporates the needs of HDL and ESL designers into a single, complementary design environment. Visual Elite 2005.1.0 offers a single solution that can be utilized to design in Verilog, VHDL, C/C++, SystemC, or any combination of the languages. It is a design and verification tool that can be used both by the system designers and chip designers on a project.

For HDL Designers

Visual Elite 2005.1.0 adds enhanced library support. External library support enables design teams to quickly and efficiently utilize the hundreds of units contained in most FPGA and ASIC libraries. Instead of reading and compiling the entire library for a design, Visual Elite intelligently views and incorporates only the needed components. Each time a library is updated from the silicon vendor, Visual Elite extracts only the needed components. This drastically reduces the time designers and CAD managers need to spend on each library update. Library support has also been extended to include property specification language (PSL) vUnits.

Hierarchy generation has been automated to simplify the use and debugging of complex netlists. Revision control capabilities have also simplified the design process, making design changes easy to track and document.

For ESL Designers

With its intuitive graphical design entry capabilities, Visual Elite eases ESL adoption. Visual Elite 2005.1.0 supports the latest release of SystemC 2.1 and the SystemC Verification (SCV) library.

Used with Vista(TM) SystemC IDE, Visual Elite now offers a bidirectional link to powerful debugging and analysis capabilities. The link operates in either a top-down mode, in which Visual Elite can export a SystemC design to Vista, or a bottom-up mode that further enables mixed-level design and analysis. When a SystemC design in Visual Elite is exported to Vista for refinement and analysis, the design team has full access to powerful features such as the transaction-level modeling (TLM) viewer, advanced coding facilities, browsers, and a verification tool-set targeted for high-level modeling.

Support for System Architect(TM), Summit's architectural exploration and optimization tool, has also been enhanced. Visual Elite can access the System Architect library for ESL components. This library now includes additional generic components, such as a generic processor for software modeling. This allows system designers to model software without the need for instruction set simulator (ISS) integration.

For Mixed-Level Designs

Visual Elite 2005.1.0 dramatically improves the level of support for mixed HDL and SystemC designs. Visual Elite offers a continuous development process, from system specification to RTL implementation. With the ability to easily mix SystemC and HDL blocks, it provides unified verification and debugging.

"Visual Elite is the only design platform to truly support both HDL and ESL designs," says Zvika Amir, technical marketing manager at Summit Design. "The new release improves design capabilities for HDL and ESL designers alike. The tightened integration with Vista and System Architect affords system-level design teams the ability to combine both levels of abstraction into a single design environment."

Visual Elite addresses the need for viewing and manipulation of large designs with re-use of existing designs components. Since Visual Elite supports commercial HDL simulators, design teams can utilize the graphical design capabilities to connect and simulate SystemC and HDL components within a single design. Visual Elite automatically generates the resulting design hierarchy, and enables the splitting of large components into many small virtual components.

When used with Vista in bottom-up mode, SystemC designers can create and verify models in SystemC and then export the models to Visual Elite in library format. This allows the SystemC models to be integrated as part of large, mixed-level designs, thereby simplifying SystemC model reuse. This also enables collaboration between system architects working in SystemC, HDL designers, and verification engineers using SCV.

Availability

Visual Elite 2005.1.0 will be available in December 2005. All current Visual Elite customers will receive the upgrade to Visual Elite 2005.1.0 as part of their maintenance.

About Visual Elite

Visual Elite is a state-of-the-art design, integration, and verification platform that simplifies and accelerates ESL and HDL-based designs. It leads the market in high-level design and reuse.

About Summit

Summit Design's industry-leading ESL and HDL solutions enable SOC companies to deliver products that meet system-level performance and power targets with dramatically reduced schedule risk. Summit's products address engineering challenges met during the specification and implementation design phases of complex hardware/software systems. System Architect(TM) enables massive increases in design complexity and performance by analyzing architectural tradeoffs to arrive at optimized system specifications. Vista(TM) and Visual Elite(TM) ensure swift, successful design modeling and implementation in SystemC, Verilog, and VHDL. Top electronics companies worldwide, including leaders in the wireless, automotive, and consumer electronics space, have achieved dramatic reductions in design cycle time through their use of Summit's products. Summit Design is headquartered in Burlington, Mass. with offices throughout the US, Europe, Japan, Israel, and ROA. To learn more, please visit http://www.sd.com.

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