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SAN JOSE, Calif., Nov. 9 /PRNewswire-FirstCall/ --
These FPGA-based methodologies enable designers to focus on
refining design at the system level while streamlining design
implementation. They extend the modern back-end register In addition, Altera will be showcasing the following demonstrations in booth 211 on the exhibition floor: -- A reconfigurable multi-standard equalizer created using
high-level FPGA design methodologies When: Keynote address, Tuesday, November 15, 2005 at 8:30 a.m. Agenda: 8:30 - 9:20 a.m. Keynote Address: FPGA and Structured ASIC Design 1:30 - 4:00 p.m. Paper: Low-Power Software-Defined Radio Using FPGAs Thursday, November 17, 2005 9:30 - 11:30 a.m. Paper: Power Comparison of Architectural Choices 9:30 - 11:30 a.m. Paper: Design Security with Waveforms 1:30 - 4:00 p.m. Paper: The Use of Hardware Acceleration in SDR Where: Hyatt Regency Orange County For additional show information visit: NOTE: Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holder. Source: Altera Corporation Web site: http://www.altera.com/
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