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Design, Verification Engineers Offered Quality Solution For Modeling, Simulating, Verifying CE-ATA Designs PALO ALTO, Calif., Oct. 11 /PRNewswire/ -- Denali today announced that its PureSpec(TM) verification intellectual property (VIP) is available for the verification of CE-ATA designs. Chip designers use PureSpec to model and simulate the detailed interaction between product designs and CE-ATA storage devices at the pre-silicon stage of chip development. Models enable developers to improve overall verification productivity and speed time to market for CE-ATA-based product designs. "Our customers demand high-quality verification IP for all of their standard interfaces, and that is what we are delivering," says Vic Juneja, Denali's product marketing manager. "Whether it's PCI Express, USB, Ethernet, DDR, Flash or CE-ATA, our customers count on PureSpec as the most complete, high-quality solution for verifying their designs. Seamless integration to all the latest design and verification tools ensures out-of-the box productivity, and when the pressure is on, they know Denali's world-class engineering and support staff is committed to their success." About PureSpec CE-ATA PureSpec CE-ATA is a complete verification IP solution for verifying compliance and compatibility of CE-ATA designs. PureSpec verification IP includes a configurable bus functional model (BFM), protocol monitor, a complete library of assertions and a data generation engine to help drive defined, pseudo-random bus traffic. Injected errors and error conditions are flagged and recovered according to CE-ATA specifications, and a cumulative coverage database capability ensures that the overall test plan sufficiently exercises the design under test. The highly integrated nature of PureSpec CE- ATA model enables direct translation from test plan definition to implementation, accelerating the verification task and verification engineers' overall verification productivity. About PureSpec Denali's PureSpec is the most widely used verification IP product for functional verification of standard interfaces such as PCI Express, USB, SATA, CE-ATA and Ethernet. It is architected to ensure high-quality, high- performance and seamless integration to all EDA testbench tools and testbench languages. PureSpec is available for evaluation at: http://www.denali.com/purespec. The Denali logo, Denali, and Databahn, PureSpec, MMAV and SOMA are trademarks of Denali Software Inc. All other trademarks are the property of their respective owners. Web site: http://www.denali.com/ |
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