BusinessWire
September 21, 2005 04:00 AM US Pacific Timezone

EVE Offers Free European Seminar Series on ASIC Prototyping; Seminars Scheduled for September 27 in Paris and September 29 in Milan, Italy

SAN JOSE, Calif.--(BUSINESS WIRE)--Sept. 21, 2005--EVE (Emulation and Verification Engineering) debuts a new seminar series next week in Europe to help designers better understand application specific integrated circuit (ASIC) prototyping. Free, half-day tutorials will be held September 27 in Paris and September 29 in Milan, Italy.

Seminars will explain ASIC Prototyping using the new Xilinx (R) Virtex(TM)-4 devices for faster, easier verification of large ASIC designs. It will offer details about the Virtex-4 architecture, describe how to port ASIC designs to field programmable gate arrays (FPGAs) and hardware/software co-verification.

Also offered will be a demonstration of EVE's ZeBu (for Zero Bugs), a hardware-assisted verification platform that harnesses Virtex-4 devices. This demo will to show how ZeBu can be used to shorten the verification of large Systems-on-Chip (SoCs) through its advanced features such as support for interactive hardware debugging.

Registration is free of charge to qualified professionals directly involved with and/or manage chip verification. To register, visit: http://www.eve-team.com/v4.html.

About Emulation and Verification Engineering

EVE (Emulation and Verification Engineering) has pioneered a new approach to hardware-assisted verification that combines the best aspects of traditional emulation and rapid prototyping systems into a single, unified environment for both ASIC and SoC debugging and embedded software validation. Its headquarters in the United States is San Jose, Calif. Telephone: (408) 881-0440. Fax: (408) 904-5800. Its corporate headquarters is located in Palaiseau, France. Telephone: (33) 1 64.53.27.30. Fax: (33) 1 64.53.27.40. Email: info@eve-team.com. Website: http://www.eve-team.com.

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