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SRC Computers Launches Next-Generation Reconfigurable Computing System Colorado Springs, Colorado -- August 23, 2005 -- SRC Computers, Inc., a leader in reconfigurable computing systems, today announced the availability of its SRC-7 system featuring the first reconfigurable processor with IEEE compliant floating point blocks and accompanying high bandwidth interconnect. The lack of dedicated low latency floating point capability with enough memory bandwidth to prevent stalling has historically been viewed as the last technical barrier to widespread adoption of general purpose reconfigurable computing. The SRC-7 succeeds the SRC-6 and provides the most powerful, programmer-friendly, reconfigurable, high performance system on the market. SRC's Carte programming environment allows programmers to use standard ANSI C and Fortran to program its reconfigurable MAP processors with no need for hardware design expertise. The announcement of the SRC-7 was made at the High Performance Reconfigurable Computing Workshop being held at the Arctic Region Supercomputing Center in Fairbanks, Alaska. The increased performance of the SRC-7 series H MAP reconfigurable processors is highlighted by: 1. The first dedicated reconfigurable double precision floating point capability with. 2. The highest per processor. 3. The largest per processor. 4. The capability for high bandwidth mass storage. MAP and Carte are trademarks or registered trademarks of SRC Computers, Inc.
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