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Aldec Harnesses Massive Server Capacity
Warning! We are going to say the “C” word in this article. If you can’t take it, just stop reading now and save yourself a lot of heartache and grief. We know a lot of you are sensitive on this topic and have deep-rooted emotional issues about it. Our advice is to seek professional counseling.
For those of you who are less delicate (we assume you’re still reading), we proudly present a system that has the potential to accelerate your design verification efforts beyond anything you could currently achieve. You know how it goes. You do your initial debugging just fine with your local copy of your favorite HDL simulator, but then you reach a point in your project where you need to crank some serious vectors through that bad boy. That’s when it gets tricky. Read More
latest news
May 15, 2012
April 27, 2012
April 25, 2012
Microsemi Commemorates 55 Years in Space and 10,000th Radiation-Tolerant RTAX-S/SL FPGA Shipment
April 24, 2012
April 23, 2012
April 19, 2012
April 12, 2012
Powerstax Launch New 500W High Voltage “Brick” at NEW 2012
April 11, 2012
Microsemi Expands Military Temperature Semiconductor Portfolio to Include SmartFusion® cSoCs
April 02, 2012
LynuxWorks Announces Membership in Future Airborne Capability Environment (FACET) Consortium
March 30, 2012
LynuxWorks Announces Safety Critical RTOS Support for Curtiss-Wright SVME/DMV-183 Platform
March 27, 2012
Xilinx Offers Defense-Grade Virtex-6Q FPGA Family with Anti-Tamper and Anti-Counterfeit Features
March 26, 2012
Embraer Selects the Ada Language and AdaCore’s GNAT Pro for AMX Upgrade
March 22, 2012
Solving the Big Secret
Synopsys Attacks SEUs in FPGAs
Faster Floating-Point
Altera Smooths Path to Floating-Point FPGA
Editors' Blog
Firewalls Everywhere
Icon Labs says that firewalls are needed pretty much everywhere these days. (5-Apr)
Software Model Test Reuse
You test your algorithms when you model them. But when someone writes the actual code and then tests it, how can you be sure they’re performing exactly the same tests? (21-Mar)
Moving Up a Different Channel
LDRA works with another early system modeling platform to catch certification issues sooner. (4-Jan)
Certifying Models
As models are used to design behavior in advance of actual coding, how do you certify that your model testing and the resulting generated code will pass muster for safety-critical designs? (3-Oct)
The Countess of Lovelace Strikes Back
Interested in Ada? Like open source? Talk to these people. (27-Sep)
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Integrating High-Level Synthesis Designs into SoCs with Less Effort and Risk
White Paper sponsored by Synopsys
Methods and Tools for Bring-Up and Debug of an FPGA-Based ASIC Prototype
White Paper sponsored by Synopsys
FPGA Prototyping with the Kintex-7 KC705 Evaluation Kit
Chalk Talk sponsored by Xilinx
It's 2022: Do You Know What Your FPGA Is?
Chalk Talk sponsored by Altera
Troubleshooting and Fast Fault Isolation with VTOS
sponsored by Kozio
A Platform for Reducing Verification Time and Improving Reliability of Embedded System Hardware
White Paper sponsored by Kozio
Power Supply Management in High-Availability Systems
Chalk Talk sponsored by Microsemi
High-Reliability in FPGA Design - SEU Mitigation
Chalk Talk sponsored by Synopsys
Using FPGAs for Trapezoidal Motor Control
White Paper sponsored by Microsemi
Design Made Easy With the SmartFusion Customizable System-on-Chip and State of the Art Software Tools
White Paper sponsored by Microsemi

