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JournalJobs.com – the job board for FPGA Journal and Embedded Technology Journal is now re-launching with a host of new features and capabilities. In celebration of JournalJobs.com grand re-opening, we’re offering free job postings through July 31, 2008. Go online, post a job, pay nothing, and watch for those qualified résumés to come knocking on your inbox. Click here to post your job listing on journaljobs.com
CHALK TALKPower Matters Trying to tame power consumption in your battery-powered device? Join Journal Webcasts host Amelia Dalton as she chats with Wendy Lockhart of Actel about how you can use ultra-low power programmable devices from Actel in even the most power-sensitive designs. (Actel)
CHALK TALKCreating Secure Mobile Devices With Open Kernel Labs OKL4. In this Chalk Talk, Amelia Dalton delves into the world
of software security and microkernels in mobile devices with Gernot Heiser
and Rob McCammon of Open Kernel Labs. (Open Kernel Labs)
CHALK TALK Designing Embedded Systems With Linux and low cost FPGAs. Join Amelia Dalton as she chats with industry experts about simplifying embedded systems design with Linux running on low-cost programmable system-on-chip platforms. (Xilinx)
CHALK TALK Lowest Total System Cost With Xilinx Spartan-3 Amelia Dalton chats with Mark Moran of Xilinx about reducing your overall system cost with the Xilinx Spartan-3 family of FPGAs. (Xilinx)
CHALK TALK Low Cost FPGA with Serdes Lattice ECP2M. Amelia Dalton talks with Bertrand Leigh of Lattice Semiconductor about low-cost FPGAs with multi-gigabit SerDes interface capability.
(Lattice Semiconductor)
July 15, 2008-This week, we turn our focus on… you. We’ve been running a reader survey lately, and the results are fascinating. We are using the data to divine some interesting trends in FPGA technology. For a look in our wide-view mirror, check out this week’s newest feature. If you haven’t taken the survey yet… we’ll let you peek anyway, but you have to promise to give us your input.
Thanks for reading! If there's anything we can do to make ourpublications more useful to you, please let us know at:comments@fpgajournal.com. If you'd rather sound off in public, please post your comments or questions in our new Journal Forums.
Kevin Morris – Editor in Chief
Techfocus Media, Inc.
Who Are You People? ...and What Do You Want? (Kevin Morris)
Over 60,000 people in over 100 countries read FPGA Journal.
Apparently, you’re one of them.
While we may be the perennial pundits of programmable logic, we don’t deceive ourselves into thinking that FPGAs are some sort of universal unification language. We do, however, think that programmable devices like FPGAs will be one of the most important technologies in electronic design moving forward. With the rapid evolution of the global high-tech economy, our position in the FPGA space gives us a fascinating lens through which we can observe and prognosticate about the pending progress of electronic engineering.
People use programmable logic for an ever-widening range of applications. As such, we notice the FPGA Journal audience expanding and morphing right along with the shockwave of pervasive programmability that is cascading throughout the electronics industry. Over the past couple of months, we’ve done a survey of our audience and learned some interesting things about where FPGAs are going, how the technology is being applied and deployed, and (most interesting to us) what you all want from a publication like FPGA Journal.
The first thing we’ve noticed is that FPGAs are going global. For a long time, the lion’s share of FPGA consumption was in the United States. If the makeup of our FPGA Journal readers is an indication, the US is still the single biggest geography, but now the other geographies are growing much faster. The Americas now account for about 40% of our readers, where they were 49% just two years ago. Europe has shown rapid relative growth, moving from about 30% to 34%. Asia/Oceania accounts for the remaining growth, jumping from 21% to 26%. [more]
The Right Equipment
Dodging the Cheap Board Sucker Punch (Kevin Morris)
Alpe d’Huez loomed large ahead. His team had been supporting and protecting him until now, keeping him squarely in the running for the yellow jersey. Today, however, he’d have to prove himself on his own – without the benefit of the drag-reducing veil of his teammates’ slipstream shadow. Years of training, and it all came down to this – the classic weed-out mountain stage of the tour.
The unruly crowd cheered, and the adrenaline went straight to his soul. He felt like he was flying up the hill. As the slope increased, however, his quadriceps began to burn. He felt himself begin to wilt. Other competitors breezed by with ease. His bike felt heavy and lethargic. Well, it was, actually. As his mind lost focus, he began to feel doubts – doubts about some of the equipment decisions he’d made.
Professional bicycles are expensive, you see. A custom, competitive mountain-stage bike weighing in at just under 15 pounds (6.8 Kg) costs thousands of dollars. He’d found a bargain ride at Wal-Mart for less than 10% of that price. Really, who could say “no” to a 90%+ savings? There were a few tradeoffs, of course. The steel frame (which wasn’t quite big enough for him) brought the total weight to over 32 lbs. The brake pads were dragging the rims a bit, and the crank had a noticeable wobble to it. The derailleur ground loudly, as the shifter wouldn’t quite drop completely into the lowest gear. Not so bad if your mission is to run down the street to your buddy’s house, but monumentally poor if you’re a professional.
[more]
Renaissance FAEs
Our Once and Future Saviors
(Kevin Morris)
In classical music, they are the organists.
My brother, an accomplished professional trumpet player, had just completed a performance for solo piccolo trumpet and organ. I was looking at his immaculately maintained instrument and noticed that one of the tuning slides was so light, it seemed it could just fall off the horn if the performer held it at the wrong angle.
“What would you do if this fell off during a performance?” I asked.
Seemingly without thinking, he replied “Oh, the organist would catch it and replace it.” [more]
Building an FPGA Design Repository by Tom Dewey,
Mentor Graphics Corporation
How often has it happened that you have just finished a complex module for an FPGA project only to later find out that a very similar module was completed a month earlier by another team within the company? Not only have you just wasted several weeks of your time, but this wasted time has also cost the company money. A quick way to become a hero by saving the company both time and money is to put in place a simple reuse repository to prevent this scenario from ever happening again.
[more]
Two Chips Or One? Avnet Provides a Daughter-card SERDES Solution for Spartan
(Bryon Moyer)
A few years ago when SERDES became available on FPGAs, they were exotic. Both for the FPGA guys and for their users. The FPGA guys had to learn how all this stuff worked, tune the (relatively) complicated analog circuits, and make it all function. Those were some of the last features to be officially released on those devices because they just took longer to get right. More than one customer was stranded waiting for parts with working high-speed I/Os.
[more]
A Passel of Processors
NVIDIA’s Tesla T10P Blurs Some Lines (Kevin Morris)
Picture this architecture – a high speed application processor doing control coupled to an accelerator comprised of a mass of processing elements ready to power-parallelize compute-intensive components of a complex problem. Sound familiar? Supercomputers have taken advantage of acceleration using schemes like this for a while. People using FPGAs for co-processors do it all the time.
[more]
Employing an I/O Interlocutor FMCs Decouple FPGAs from Complex I/Os (Bryon Moyer)
It used to be so simple. PLDs provided a medium by which you could create and modify logic without having to make any board changes. All the variability was on the inside; the outside consisted of I/Os, and, back in the day, that meant one thing: TTL. Eventually, when CMOS became more prevalent, the less-often-used rail-to-rail CMOS interface was available, but those I/Os were on different devices that were dedicated to the CMOS low-power market.
[more]
Xilinx speeds HDL simulation with SecureIP and FAST Simulation Mode Models by Howard Walker,
Xilinx, Inc.
Xilinx Virtex-class FPGAs feature several advanced hardwired, hard IP blocks, some of which we must protect for legal reasons. Traditionally, to allow customers to use these blocks effectively while preventing theft or tampering, we’ve offered customers black-box simulation models called SmartModels of these cores. However, some customers have found these models hard to use and note the models tend to run much slower than regular RTL models in third-party simulation environments. So with the introduction of Virtex-5 FPGAs, we now support a much faster, easier to use but protected form of simulation model called a SecureIP model. [more]
New Kid in Class
SiliconBlue Debuts Low-Power FPGAs (Kevin Morris)
There’s a new kid in class.
We’ve all been through this scenario before. All the players are comfortable in their established roles. The leader tries to stay ahead and always communicates with the purpose of maintaining the perception of leadership. The second player vies constantly with the leader for supremacy and mind-share, always trying to one-up the alpha dog. The third through fifth players are constantly flanking, trying to differentiate and establish themselves based on supremacy in a particular niche.
[more]
