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Is your FPGA D.O.A. in the system? Learn how a new approach to FPGA verification called Device Native® verification combines the best attributes of simulation with hardware-assisted techniques to boost verification productivity, and avoid weeks of debugging in the lab. Download Whitepaper
IC Journal - Do you love FPGA Journal? We're happy to announce our new IC Design and Verification Journal. It's just like FPGA Journal except, you know, about ASICs and stuff.
Free Job Postings on Journaljobs.com
JournalJobs.com – the job board for FPGA Journal and Embedded Technology Journal is now re-launching with a host of new features and capabilities. In celebration of JournalJobs.com grand re-opening, we’re offering free job postings through July 31, 2009. Go online, post a job, pay nothing, and watch for those qualified résumés to come knocking on your inbox. Click here to post your job listing on journaljobs.com
CHALK TALK Power Estimation in a High-Level DSP Design Flow. Want your DSP design to consume less power? Join Amelia Dalton as she talks with Tim Vanevenhoven of Xilinx about new methods for estimating and reducing power consumption in FPGA-based DSP designs. (Xilinx)
Designing for Low Power with Actel Flash FPGAs. The webcast features: the benefits of flash versus SRAM technologies; an introduction to Actel’s low-power FPGA families; software tools for low-power design; low-power design tricks; hardware for evaluating low-power designs. (Actel)
CHALK TALK FPGA - PCB Co-Design Done The Right Way. Join Amelia Dalton as she talks with Hemant Shah of Cadence Design Systems about new ways to manage the complex issues that arise when trying to optimize pin assignments for both FPGAs and PCBs. (Cadence)
FPGAs Verifying FPGAs. Advanced FPGAs now require a more rigorous verification approach or designers risk spending months in the lab trying to debug their designs in-system. Learn how Device Native® verification integrates seamlessly with your existing FPGA design tools and delivers significant productivity improvements for verification and debug. (GateRocket)
CHALK TALKFrom Desktop to Target: What You Need From A Development Suite. Is embedded software development and debug a challenge for your team? Join Amelia Dalton as she chats with Jit Sivalogan of Mentor Graphics about setting up a productive environment for embedded development. (Mentor Graphics)
CHALK TALKConfirma™: The Next Era Of Prototyping. Struggling with FPGA prototyping boards? Join Amelia Dalton as she talks with Juergen Jaeger of Synopsys about the Next Era of Rapid Prototyping. (Synopsys)
June 30, 2009 - This week, Altera changed the game in low-cost FPGAs with Cyclone III LS. The new family boasts the largest density we've seen in a low-cost FPGA, very low static power, new security features, and a clever design partitioning capability. Our latest feature has the details.
Thanks for reading! If there's anything we can do to make our publications more useful to you, please let us know at:comments@fpgajournal.com. If you'd rather sound off in public, please post your comments or questions in our Journal Forums.
Kevin Morris – Editor in Chief
Techfocus Media, Inc.
Locking Down Power
Altera Rolls Out Cyclone III LS (Kevin Morris)
We've talked a lot in the past about the process node tango danced by the two largest FPGA companies. With each step, one leads and the other follows - usually with a twist. Unlike the traditional tango, however, we often have the lead changing with each subsequent move - a scheme certain to confuse most dance fans, but a situation that makes the FPGA market far more interesting. Also, unlike in the traditional tango, both dancers are doing their dead-level best to knock the other one off their feet. That makes things really exciting - from our perspective, at least.
Let's review the normal steps, then see how the dance is progressing.
Cue music: Let's go with Astor Piazzola's "Libertango"...
five... six... seven... eight...
1998 - Xilinx launches "Spartan" - the first low-cost FPGA family. Altera hasn't heard the music start and is still in the dressing room adjusting wardrobe.
1999 - Xilinx takes the second step with widespread deployment of Spartan-II. [more]
Power Primer Is That My FPGA Burning?
(Kevin Morris)
We've talked about power a lot on these pages over the past year. We've told about advances in power optimization and estimation, struggles with leakage current at smaller geometries, clock gating, configuration peaks, and a bunch of other hot topics in cool FPGA design. All of these late-breaking developments are wonderful if you already know the starting point. However, many of our readers have pointed out that we could use a little more background. It's not that exciting to find out that leakage current has been reduced by 50% if you don't know what the leakage current was to begin with, whether it was a problem, and what direction it was going before.
So, for those people, we present our FPGA Power Primer. This article should give you a nice base map for your exploration of the power landscape in FPGAs. If you've done lots of electronic design outside the FPGA world, pay particular attention. Power in FPGAs probably doesn't work the way you think. The rules, assumptions, and results are different (and often counter-intuitive) compared with, say, power consumption in processors. [more]
The Simulizater Is Not God
A Twist on Simulate Versus Synthesize by Ben Jordan, AltiumLtd.
It’s crunch time. The prototype for our board has been spun and is in transit back to our lab for testing. The project is already two weeks behind schedule thanks to late changes to the spec and problems discovered during signal integrity analysis of the layout. It’s been good for me because, quite frankly, I needed those two weeks to get my test bench to where I am satisfied that I have done due diligence to the simulation.
The project has been coded in VHDL, and I have taken a fairly disciplined approach – maintaining hierarchy throughout, using entity declarations for all black-boxes, primitives and macros (so the design is more portable and meets the IEEE standard as much as possible), and a mostly RTL-styled approach. Of course, some of my design is behavioral, or else I have ignored the major benefit of HDLs altogether – the ability to use behavioral abstraction. [more]
Climbing the Pyramid Saving Engineering Education (Kevin Morris)
When most of us went to engineering school, we planned to immerse ourselves in the ocean of technology. Our education started with foundations of mathematics and science, and then, like some giant tech-history-TiVo, fast-forwarded us through centuries of experience and innovation to get us to a point somewhere near the state-of-the-art at the time of our graduation.
We soon learned that our engineering degree was simply a license to learn, however. In an environment of exponential change (as evidenced by Moore's Law), the actual technology we mastered in our educational process was probably obsolete before our first day of professional engineering work. It's not that our education wasn't valuable. It's just that the part we needed had nothing to do with the using the TEGAS simulator, throwing down transistors on a CALMA station, or our mad FORTRAN coding skills. [more]
Bounding Raptors (Dick Selwood)
“With a bound he was free,” was always the way to get your hero out of a difficult position. You know the sort of thing – the hero is tied hand and foot in a cellar that floods on every tide. The tide is rising. The heroine is at the mercy of the evil villain who is twirling his mustachios in anticipation. “And, with a bound, the hero was free.” He shatters the cellar door with a karate kick, fells the villain with a straight right to the jaw, and sweeps the heroine into his arms and into the west, where they live happily ever after.
It would be surprising if that were the scenario that FPGA start-up M2000 had in mind when the company changed its name to Abound Logic in October 2008. (And of course the name wouldn’t have been chosen to get to the head of the alphabetical list of FPGA companies would it? No. Surely not?) But why start another FPGA company? Isn’t the market already fully served? [more]
FPGA the Holistic Way Flow Integration from Concept to PCB by Ehab Mohsen, Mentor Graphics Corporation
In established FPGA development houses, managers look for predictability in product roll-out, from design creation to sign-off. This is no small feat. Development groups must deal not just with design complexity but also with project complexity.
Engineers with differing areas and levels expertise have to coordinate their own work, their tool flows, and a host of interdependencies. One might think the process would become smoother and more predictable from one project to the next, evolving toward a “standard methodology.” [more]
Akya Reconfigurable Logic Roll Your Own FPGA - Sort of (Kevin Morris)
Often, we choose an FPGA not for just one design, but for a whole class of problems. If we're doing video display products, for example, we may want to design-in an FPGA that can be reconfigured for a variety of display types and feature sets - depending on display size, formats, signal sources, and a number of other variables. The basic parameters of the application are known - there will be a signal stream coming in, a datapath that processes that stream, a controller that sequences the datapath, some memory elements for buffering and storage, and some output stream. [more]
Xilinx Strengthens Its Defenses
New FPGA Families for Mil/Aero (Kevin Morris)
Designing for military and aerospace applications can be tough sometimes. The other designers - you know, the ones that do commercial applications - can have the pick of any cool technology they want to use. If some new femtowatt terahertz nanodollar FPGA rolls off the fab line, those commercial designer kids can grab it and go. You, on the other hand, have to stick with only devices that are certified, proven, specially packaged, and ... old. It's like they're going out on dates in their Dad's new Porsche or Ferrari while you can either drive your own Citroen deaux chevaux vapeur or borrow your brother's yellow 1972 AMC Pacer.
[more]
