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A Perfect DSP Storm

For years, we've discussed how, for high-performance algorithmic design, FPGAs are capable of performance, efficiency, and cost-effectiveness orders of magnitude better than alternative solutions like DSP processors*. There! Did you see that? The asterisk? You know what that means. Somewhere, down the page, hidden in the fine print at the bottom is the caveat. This time, however, we won't bury the caveat. We'll pull it up in plain view, attack it, and make it go away permanently... well, almost.

For years, we've also discussed how, for algorithmic design, high-level synthesis tools (HLS) can take your C or C++ algorithm and automatically create optimized, parallelized hardware implementations that approach the quality of hand-coded RTL*. Yep, another asterisk. We'll tackle that one too.