The MEMS Testing Quagmire
Players are Increasingly Looking for Extrication
Testing is an unfortunate but important requirement for being in the chip business. Unfortunate because it’s expensive and, well, annoying. Important because no one would trust electronics that had never been tested. And systems builders would end up throwing a lot of useless stuff away. It’s the “failure costs 10x as much for each later stage at which it’s caught” thing. Read More
latest news
May 15, 2012
May 11, 2012
Agilent Technologies Announces Voice-over-LTE Test System Developed with Brüel & Kjær
May 02, 2012
Tektronix Enhances Optical Modulation Analysis Solution
Agilent Technologies Introduces 6-GHz Signal Generators with Industry-Best Performance
April 26, 2012
April 25, 2012
Agilent Technologies to Demonstrate New High-Performance Test Solutions at CTIA Wireless Show
April 16, 2012
Protecode Announces Streamlined Audit Service for Discovering Open Source and Third Party Code
April 11, 2012
April 06, 2012
Agilent Technologies, ETS-Lindgren Host CTIA Wireless MIMO OTA Educational Panel Discussion
April 05, 2012
Tektronix Announces DDR3-2133, DDR3-2400 Logic Debug, Protocol Validation Solution
Two Conversations at Once
octoScope Reduces the Cost of MIMO Testing
Necessary and Sufficient?
A Closer Look at Cell-Aware Modeling
Are You Covered?
Software Test Coverage Isn’t as Straightforward as You Might Hope
Editors' Blog
Software Model Test Reuse
You test your algorithms when you model them. But when someone writes the actual code and then tests it, how can you be sure they’re performing exactly the same tests? (21-Mar)
What Comes Around… Is Reflected?
A couple years ago at DesignCon, Intel proposed a new way of testing the insertion loss of differential traces on a PC board. A couple years later, it’s being incorporated into test equipment. (6-Feb)
Validating Serial Protocols
If you want to convince yourself that your super-fast protocol running on a high-speed serial link really works in the real world, you need to test it with something that can actually run at speed. (14-Dec)
Closing the Thermal Loop
Mentor does something with thermal that electrical folks had to do a while ago. (12-Dec)
Describing User-Defined Faults
The Cell-Aware fault modeling approach allows ad hoc faults to be identified, but how do you communicate those faults to the test-generation tools? Especially if you have some faults you want to define by hand? (28-Nov)
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