Happy Birthday!
FPGA Journal Turns 4

Four years, more than 200 weekly newsletters, hundreds of product announcements, briefings, interviews, conferences, and trade shows – for a four-year-old, FPGA Journal has really been around the block.  When we launched this publication in 2003, we had high hopes for a bright future for our innovative approach to technology journalism.  We had no idea, however, how well things would go.  In short order we had written our own book – and dispensed with all the paper -- on delivering interesting high-quality technical content to an audience of engineers.

Apparently, most of you agreed, because our audience has grown to over 60,000 worldwide (if you visit at least once per month, you count) in over 90 countries.  We’ve kept our focus on providing you as electronic designers with content that is interesting, relevant, and fun to read.  You’ve responded with your patronage, your support, and your comments, and for all of those things we are immensely grateful.  Year four has been an awesome one for us. 

Editorially, we charted the rapid migration of FPGAs into the automobile, where telematics engineers are discovering new ways to harness the power and flexibility of programmable logic in an engineering environment historically known for its laggardly adoption of new technologies.  We mourned as Dataquest ceased covering the design automation industry, and we apparently gave a lot of you nightmares with our fictional foray into a haunted semiconductor fab line. 

We talked about solving signal integrity issues as SerDes moved from novelty to leading-edge technology and then into mainstream standards like PCI Express, and we explained the role of programmable logic in bridging the transition from parallel connectivity to high-speed serial interfaces. We also looked at emerging killer-apps for FPGAs such as DSP acceleration and software-defined radio.  We also took apart some new supercomputer architectures and found FPGAs doing the heavy lifting as FPGA-based reconfigurable computing quietly continues its march from academic discussion to real-world practicality.

We also covered the advent of volume production of 65nm devices and discussed the fact that, contrary to dozens of predictions, the sky did not, in fact, fall at 65nm leaving us all dazed and drowning in a post-Moore’s-Law puddle of liquid leakage current.  65nm FPGAs work just fine, thank you, and have better performance, higher density, and lower total power consumption (especially on a per-gate, per-megahertz basis) than in any previous process node.  We now have every reason to believe that we’ll be writing about 45nm FPGAs one day as well, equally amazed that the end is still not nigh.

We also tracked (with great interest) the trend toward more and more specialized FPGAs.  Vendors are realizing that one size cannot possibly fit all, providing not only more sizes and speed grades, but many more configurations of IP blocks such as hardware multipliers, block RAM, flash, hard-core processors, and SerDes I/O.  Some vendors even started producing highly-targeted devices with specific combinations of hard-IP and reference designs aimed at particular applications, allowing the programmable fabric to act as a canvas for the individual design team to differentiate their product.

The cost of functionality implemented in FPGA technology dropped precipitously again this year – with the largest devices getting cheaper, new families of inexpensive devices emerging, Moore’s Law bringing the cost of everything down, key features such as SerDes migrating into lower-cost platforms, and more vendors announcing cost-reduction programs, either with design-specific testing or with full-on structured ASIC conversion.  With the dropping comparative cost-per-gate of programmable devices, a bevy of new designers noticed that they could consider the option of FPGAs where they were not feasible in the past. 

The competition and quality of tools for automating FPGA design also made significant advances this year.  Third party EDA vendors continued to invest in new product capabilities, and the FPGA vendors themselves showed no signs of slowing their internal design tool development programs.  If you’re starting a new FPGA company today (not recommended), you’ll probably be hiring significantly more engineers for design tool development than for designing the devices themselves.  In today’s design world, software tools are almost everything.  The productivity leverage required to create designs with billions of transistors on schedules driven by diminishing market windows pushes tools to the forefront. 

In addition to the classical RTL-to-bitstream design flow, higher level design methodologies gained ground with significantly more adoption worldwide.  As we move up to the “system” level with so-called ESL methodologies taking over the high-level design tasks, we’ll also see more application- and domain-specific methodologies emerge.  Already today specialized tools suites for tasks like DSP design are commonplace.  We expect even more specialized tool flows to emerge in the coming years.

At the same time we were reporting all this progress in FPGA-related technology, we have not stopped moving our own technology ahead.  We launched our webcast site (which really shifts into a new gear this week with our ARM Developers’ Conference webcast), we re-vamped our Journal Jobs job listing site and made employment ads free, and we launched our Journal Forums discussion site.  FPGA Journal’s little brother, Embedded Technology Journal, is celebrating its second birthday today and has grown into one of the strongest embedded systems publications in the industry.  Within the next few months, a new, third publication will be joining our Journal family – IC Design and Verification Journal, aimed at ASIC System-on-Chip design and high-end electronic design automation.  With the addition of that publication, we’ll have you covered, almost no matter what type of electronic design you do.

Speaking of publications, with the continuing move to new media and online delivery for most technology-related publications, it has been a tough year for many of the traditional publishing companies.  At the same time, a number of new competitors have emerged to keep us on our toes and doing what we do best.  Our plan is to stick to our values of high-quality original content, flexible and efficient delivery, objective and insightful analysis, and a little fun to keep you coming back to our Journal publications. 

We’d also like to thank our sponsors for providing the support that makes our publications possible.  Without the advertising dollars they provide, we wouldn’t be able to bring you the feature articles, news, webcasts, and other goodies that you come to us for.  We are committed to keeping our Journals free for you, the reader, and also to maintaining an objective editorial position independent of sponsorship and advertising revenues.  The consistent level of support we enjoy from the companies whose advertisements you see on our pages makes all of that work.

Our own Techfocus Media team also continues to grow and evolve.  We’d like to thank Laura Domela, Shirley Rice, Kayla Kurucz, Amelia Dalton, Jim Turley, Dick Selwood, Karla Rodriguez, Truett Petty, and Rosemary McGuire for their contributions during the last year.  Without their tireless and inspired efforts, we would not be the publication you know and enjoy. 

October 2, 2007

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