ARM and Altera
Why You Should Care

The ARM Cortex M1 is out to conquer the world. 

Stealthily.

Cleverly.

Kindly. 

It will probably be one of those rare conquests where the conquered smile and rejoice and say “Thank you!  Thank you for conquering us!” 

Electronic designers will flood the streets in celebration, now having access to exactly what they have needed all along.  Even those who weren’t aware that they needed anything different will be excited and appreciative.  The earth will simply be a better place.

OK, maybe it’s not as big as all that.

To understand why we should care about this week’s announcement that Arrow will be distributing development kits enabling ARM’s FPGA-optimized Cortex M1 processors on Altera’s Cyclone III FPGAs, we need to revisit some of the history of FPGAs as systems-on-chip (SoC).

It is only fairly recently in FPGA history that FPGAs had the horsepower to make viable system-on-chip platforms.  Before sometime around the 130nm process node, there just weren’t enough equivalent gates or performance to do much useful embedded processing work on an FPGA and have room left for – you know, FPGA stuff.  Once we got the performance and capacity to put a processor (or four) down, we had to look at the question of real engineering tradeoffs – why should the processor (soft or hard core) be on the FPGA instead of sitting right next to it?  For many of us, even when companies like Altera (with their Excalibur hard-core ARM or MIPS processor platform), Xilinx (with the early PowerPC hard-cores on Virtex-II Pro devices), and QuickLogic (with their QuickMIPS hard-core MIPS processors on non-volatile FPGAs) launched early SoC FPGAs, we were less than enamored. 

Something more had to happen.

Something more did.

The FPGA companies learned from the lessons of the embedded hard core.  The architectures were all wrong.  We had processor cores optimized for low cost and low power sitting on expensive, power-hungry devices. That didn’t make sense.  We had only one or two options available for processor configuration when the catalog of discrete processors offered hundreds.  FPGAs were about flexibility, but dedicated hard cores were just the opposite.  Soft core processors, on the other hand, had flexibility in spades.  You could configure them with exactly what you needed – no more, no less.  Want 32-bit RISC?  Just configure it.  Only need 16 bits?  No problem.  You can go for less area or more performance, add cache and pipeline stages – or not.  You could have just one small processor to use as a microcontroller or fancy state machine or several big ones doing major multi-processing tasks.  You could even be running sophisticated operating systems… very, very slowly.

FPGA companies started the battle of the soft-core processors.  Altera poured resources into their NIOS (and later NIOS II) soft-core families.  Xilinx rode their MicroBlaze horse.  Lattice followed suit with their open-source Mico32 offering.  Actel, however, in their usual fashion, pulled a flanking maneuver.  Where the other companies had gone the “sticky IP” route – making soft-cores that would “stick” customers with their silicon once they committed, Actel went for the road less traveled.  They partnered with ARM and rolled out a soft-core version of the ARM7 licensed for Actel’s non-volatile FPGAs.  For the most part, however, the ARM/Actel alliance didn’t affect the mainstream of the FPGA market.  Actel’s non-volatile flash-based devices serve a specific (and rapidly growing) niche such that they don’t often compete directly with the SRAM-based products of the larger FPGA companies.

Once ARM had entered the picture, however, new things began to happen.  First, as we described in our article [http://www.embeddedtechjournal.com/articles_2007/20070320_cortex.htm]  last March in Embedded Technology Journal, ARM noticed (like many of the rest of us) that IP cores designed for ASIC didn’t work all that well in FPGAs.  The world’s largest processor IP company decided to do something about that.  They designed the new Cortex M1 processor core specifically for the LUT-based, register-rich, quirky architectures of FPGAs.  The result was a much smaller, much higher performance soft-core processor, which they announced last March in conjunction with Actel.

We knew at the time that the Actel arrangement was just the tip of the iceberg.

We were right.

This week, ARM added Altera to the collection of FPGA companies supporting the Cortex M1.  Altera apparently came along willingly, not kicking and screaming and defending their proprietary (and worthy) NIOS II processors.  They had no reason to.  Although we haven’t benchmarked them (yet), the ARM running at a reported 200MHz on a Stratix III device or 100MHz on a low-cost Cyclone III probably won’t have as much performance as the fast version of a Nios II on the same FPGA. (To compare an orange with these apples, the Actel Cortex M1 performance was given at 72 MHz at the time of announcement).  It also probably won’t be as small as the smallest Nios II either.  This announcement is not about that.  It is about the fact that an industry-standard processor architecture holding most likely the largest installed base on the planet (yes, more than Intel – count the computers; now count the cell phones) is now basically plug-and-play on a major vendor’s FPGAs.

For the FPGA industry, this is validation that more and more design weight is coming into programmable logic.  If ARM is taking the FPGA market seriously enough to develop and deploy an FPGA-specific core across multiple vendors (no, we don’t believe this will be the last), they must see a trend toward rapid growth in FPGA use in embedded systems.

For Altera, this is validation that the emphasis they’ve put in infrastructure for embedded system development on FPGAs is paying off.   Let’s look at the details of the announcement for some insight on that.  Notice that the development kit is based on Altera’s SOPC Builder.  That means that you’ll be using Altera-standard tools to instantiate your processor core.  It also means that you’ll be stitching your system together with Altera’s Avalon switch fabric (rather than AMBA bus).  That then means that the peripherals you’ll be attaching to that switch fabric will be those already optimized for Altera FPGAs – those designed for use with Avalon and SOPC Builder.  On top of all that, we’d speculate that you’ll eventually be able to use Altera’s C2H compiler to accelerate slower routines from your software into hardware accelerators in the FPGA fabric.  (C2H has only announced Nios II support to date.)  With the ability to accelerate performance-intensive routines into hardware, the power of soft-core FPGA-based computing takes a tremendous leap.

For those of us in the development community, it means we have more options.  People who have existing experience with ARM tools and ARM processors can use the Cortex M1 and have portability to other FPGA technologies.  They also have portability of their object code up to the ASIC-based Cortex M3 offering from ARM, a big bonus for those that do prototyping and early development in FPGAs and then hope to migrate to ASIC for cost reduction.  Speaking of cost reduction, although the development kit being announced is only for Cyclone III, we can assume that ARM will license the core for Stratix III devices as well (since they quote performance numbers for it.)  In that case, it would be logical to do a design in Stratix III and then cost-reduce with Altera’s HardCopy structured ASIC conversion – bringing the ARM core along with the design.

The Cortex-M1 is ARM’s smallest processor core, and it is optimized specifically for FPGA implementation.  It is upwards code-compatible with the other Cortex processors.  The Cortex line consists of three series of processors: A series (applications), R series (real time), and M series (microcontroller).  All share the Thumb-2 blended 16/32-bit ISA - meaning that you can run a full 32-bit implementation or narrow the width to conserve resources like, for example, on-chip FPGA memory, and still not run into instruction set problems.  The Cortex-M1 is also ready for OS support with integrated system timer and interrupt controller.

On the software development side, the full arsenal of ARM-compatible tools, headed up by ARM’s RealView Development Suite, is at your disposal.  The system can be debugged using the Altera FPGA JTAG environment through the same USB cable you use to configure the FPGA.  The combination of Altera’s and ARM’s tool sets should give Cortex M1 one of the most powerful and robust offerings around for embedded platform construction and embedded software development, debug, and deployment.

If we had to guess, we’d expect to see ARM-based FPGA kits for more and more FPGA lines and an increasing number of design teams going with the silicon-independent future promised by the arrangement.  For the FPGA industry, the investment by an A-list IP company signals a major milestone in the maturity of the FPGA market and of the FPGA ecosystem.  With ARM in the game, a lot of other IP companies are likely to jump on the FPGA bandwagon at last, with some confidence that it is now possible to construct a profitable and growing business on FPGA-targeted IP.

September 11, 2007

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