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Happy Birthday to Us It’s time again to bring home that cake from the grocery store bakery, ditch the box, mess around with the frosting a bit so it looks more “homemade,” and tell the guests that you spent all afternoon baking it. FPGA Journal is turning 24 months old (that’s 11000 for those of you that absolutely can’t let go of binary math, even for a party). Since October 1, 2003, we’ve brought you hundreds of feature articles, thousands of press releases, a good number of controversies, and 104 weekly e-mail newsletters. This week, in addition to our 2-year anniversary, we’re celebrating the launch of our new sister publication: “Embedded Technology Journal.” We think Embedded Technology is a good companion to FPGA Journal, with a little bit of overlap and a whole lot of new audience and material to cover. If your FPGA designs are part of embedded system designs (or if your embedded system designs are inside your latest FPGA), you will probably want to subscribe to that publication as well. In pre-release it broke all records with over 4,000 subscribers pre-registering for the new pub. We also launched our completely re-vamped job site “Journal Jobs” ( www.journaljobs.com) this summer. If you haven’t seen the new site yet, go check it out. You just might find your next promotion. Since the re-work, Journal Jobs has had an 8X increase in average daily traffic and is still growing. Finally, in case you didn’t notice, we’ve changed our name. With the increasing importance of structured ASIC technology in the market and the growing number of readers flocking to our structured ASIC articles, we decided it was time to acknowledge the coming of age of structured ASIC in our masthead. Our articles will still be the same, but now we have a sign out front to tell structured ASIC folks that it’s OK, they can come inside and feel welcome too. FPGA Journal has continued to grow, now with over 50,000 total readers in over 90 countries, and with almost 16,000 subscribers to our weekly e-mail newsletter. We appreciate your continued interest in making us now the premier FPGA-related publication in the world. Over the past year, we’ve seen a number of interesting developments and received a considerable amount of feedback from you on what we’ve said and how we’ve said it. Our most read (and easily most controversial) article of year number two was “World’s Best FPGA Article” which poked more than a little fun at the battle of superfluous superlatives among FPGA and EDA companies vying for your company’s consideration and cash. The article also got (by far) the most reader feedback we’ve ever received, with over 300 e-mails like:
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We also got a considerable amount of feedback for “Ditchin’ DAC” – our look at the paradoxical purgatory perennially enveloping the venerable Design Automation Conference. On the plus side we got comments like:
We also got some strong disagreement, like:
The biggest silicon story of the year is clearly the brewing battle in low-cost, high-volume FPGAs. Xilinx, Altera, Actel, Lattice Semiconductor, QuickLogic, and Atmel have all invested enormous engineering and marketing resources in launching product lines aimed at this potentially lucrative new market segment. As they’ve done so, the pressure has mounted to bring down advanced capabilities from high-end FPGA lines into the low-end product families. As a result, the capabilities on the low-cost products are increasing and the price of the high-end products is dropping like a rock. Eventually, there may be a continuous line between the two, and the result will be better for all of us as consumers. On the tools front, the hottest trend right now is in tools that take you from algorithm to architecture – starting with “programming” languages like C, C++, and various hardware-modified dialects of the two and generating hardware architectures directly without requiring you to write a bunch of bad ol’ RTL/HDL. People are wanting to use these tools for everything from DSP design acceleration to reconfigurable computing to portable IP design, and for everybody from hard-core digital designers to never-thought-about-hardware software engineers. Compounding the confusion is the fact that Dataquest decided to throw these tools into their ill-defined and even less understood “ESL” category. It’s like a shopkeeper throwing his diamonds into a bin with glitter, rhinestones, and sequins and labeling it “sparkly trail mix”, then trying to decide how much to charge for a pound. We also continued our series of personality profiles, with features on Mentor CEO Wally Rhines, Xilinx CEO Wim Roelandts, Altium Founder Nick Martin, QuickLogic CEO E. Thomas Hart, and Nallatech Founder Allan Cantle. These people and the companies they run have a profound impact on the electronics industry, and we’re lucky to have the chance to sit down and chat with them on their philosophies, predictions, and plans. Once again, we appreciate the time these experts spent with us to share their views on the industry, and we plan to continue this series through 2006 as well. Altogether, year two was a fantastic success for FPGA Journal. We want to thank you, our readers, for your continued patronage and feedback. We also want to give a big thanks to our sponsors, now too numerous to list, who keep the lights on for all of us. Finally, I want to thank the dedicated people who work to bring you FPGA Journal each day including: Laura Domela – chief web designer, Kayla Kurucz – business development, Shirley Rice – copy editor, and Amy Malagamba – contributing editor.
Kevin Morris, FPGA and Structured ASIC Journal October 4, 2005 Comments on this article? Send them to comments@fpgajournal.com |
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