| |
| HOME :: JOB
LISTINGS :: WEBCASTS :: ARCHIVES :: MEDIA
KIT :: SUBSCRIBE :: FORUMS
EMBEDDED TECHNOLOGY JOURNAL :: IC JOURNAL |
Design-in Kits Address Challenges of Multi-Gigabit System Interconnect After performance requirements for a system have been established, selecting the right devices to integrate into the system is an important and time-consuming part of the high-speed product design cycle. Careful attention to interconnect constructs is required when selecting devices capable of moving data around a system at gigabit data rates. Many IC companies spend significant effort providing written documentation that guides users on how to design interconnects that work with their devices. Systems companies must then spend considerable time reading and interpreting the documentation in order to evaluate performance of various devices before moving on to the board/system design. For the PCB or systems designer, the size, cost and performance of each device is carefully considered in spite of stringent time-to-market pressure. . The design guidelines from IC companies are typically documented in a combination of terminology—some of the terms may be very familiar to the electrical engineer and some, less familiar to the PCB designer. On the other hand, some of the documentation will be more in line with typical terminology used by the PCB designer and less so by the electrical engineer. The time needed to convert design guidelines to constraints understood by EDA tools becomes a challenging situation for the designer. Time that could be better spent moving on with the system design must be allocated to interpreting and translating each device’s design-in guidelines. For either the electrical engineer or the systems designer, electrical and physical design-in is often delayed by the need to interpret the documentation. Interpreting these documents, and performing analysis to validate the device to meet performance requirements, will take weeks for each of the complex devices that are considered for the system. One way to bridge the gap between electrical engineer and PCB designer is for the IC company to provide a kit illustrating a circuit’s behavior in electrical topologies that capture the topology limits as boundary constraint templates. The sample constraint templates can be used as is or modified if necessary, and then applied to the systems company’s design. Design-in kits will also include an electronic reference PCB design with physical examples of interconnect adhering to the boundary constraint templates. Working with these physically implemented constraints gives designers an option to re-use working constructs or to easily explore the performance impact of modifications. Starting with design-in kits instead of mere documentation will jump start the design-in process and remove months of undesirable time from a systems company’s design cycle. Another key benefit to design-in kits is their ability to provide constraints to help validate the final physical design. Imprinting design guidelines into the design will provide important time savings in the system verification process. Having the physical constraints embedded into the design can provide PCB designers with on-the-fly feedback as to when the guidelines are not being followed. PCB designers can correct problems immediately without having to wait for a batch design rule check to identify problems. In addition, the electrical verification data, also stored as part of the constraint template, will allow the electrical designers to perform post-route analysis. The simulation results will validate the high-speed interconnect design was successful. Design-in kits allow for a smooth hand-off of design-in guidelines from an IC company to a systems company. With the size and speed of today’s complex devices, systems companies need to take advantage of the availability of design-in kits for FPGAs, network processors, microprocessors, and other devices. Just as IBIS modeling has become a required deliverable over the past decade, the industry will see design-in kits become a necessary means of enabling systems companies to get their products to market quickly and efficiently. Brad Griffin Brad Griffin is Product Marketing Director, Chipset Enablement, of the Silicon-Package-Board Division, Cadence Design Systems. Since joining Cadence in early 2003, his responsibilities have included strategic planning, market development and product definition. Griffin has had over 12 years experience in electronic design automation technologies that enable the design of integrated circuit packaging and printed circuit board systems. Griffin is a graduate of Arizona State University. December 9, 2003 Comments on this article? Send them to comments@fpgajournal.com |
All
material on this site copyright © 2003-2009 techfocus media, inc.
All rights reserved.
FPGA and Structured ASIC Journal Privacy Statement |