Aftermarket Avalanche
New Products Propel FPGAs into a Broader Base

One indicator of a maturing market is the introduction of products at the peripheries. New add-ons to the core capability are introduced that make the main item more valuable and useful to a wider variety of customers. Recently, a wave of new products has hit the market that promises to bring programmable logic to new audiences. These are not new devices or bigger, better, faster FPGA design tools. They are one step removed. They bring specific capabilities to specific markets that bridge the gap, allowing new projects to take advantage of programmable logic technology in a new way.

Let’s look at three newly introduced technologies and how they bring new applications into the programmable logic domain. We’ll check out AccelChip’s offering that brings FPGA-based hardware acceleration within reach of DSP designers, Altium’s Nexar which allows board-based system designers to harness the power of SoC FPGAs, and Xilinx’s line of line-card solutions that promise to do for the backplane-based communications industry what FPGAs did for the, well, backplane-based communications industry, actually.

AccelChip DSP Synthesis

The emergence of FPGA as a platform for accelerated digital signal processing (DSP) is well documented. In our “Beyond Processors” article, we analyzed the increasing use of high-performance FPGAs to supplant arrays of DSP processors for high-end applications. The problem, as we stated in that article, is that FPGA offers an order of magnitude performance boost in exchange for an order of magnitude design complexity penalty. A week or two of DSP programming could, unfortunately, be replaced by months of micro-architecture design, RTL coding, HDL simulation, synthesis, and timing closure woes. While the result might well be a single-chip design with lower cost, higher performance, and less power consumption than an array of DSP processors, for many design teams, the benefits are simply not worth the engineering costs, or they simply don’t have access to the required hardware engineering expertise in the first place.

Enter AccelChip DSP. The latest product release from the California-based startup bridges the gap between the DSP designers’ native tongue – Matlab, and the very foreign dialect of hardware design. Design teams accustomed to using DSP processors can continue to develop algorithms using their familiar Matlab environment, and then take those designs into FPGA-based hardware implementations using AccelChip’s solution. AccelChip DSP really facilitates the bridging of two gaps: the gap between available DSP processor performance and the demands of high-speed applications such as image processing, and the gap between software-based DSP design and HDL/RTL-based hardware design.

Having spent their formative years marketing themselves to hardware design groups as an EDA tool, AccelChip is now savvy to the fact that most DSP designs are done by designers who are more like software experts than hardware gurus. These designers think more about algorithms than architectures, and AccelChip’s revised product offering and marketing slant reflect that reality. AccelChip DSP allows the DSP designer to complete his algorithm design in Matlab as usual, then it automates the process of translating that design into a high-performance hardware architecture that can be implemented on an FPGA or structured ASIC. Now marketing the solution as DSP Design Automation, AccelChip DSP is seeing increased acceptance from the DSP community, and in doing so, is bringing FPGAs to a whole new audience. For more information, check out Dan Ganousis’ contributed article on top-down DSP design.

Altium’s Nexar

Late last year, Altium announced it was developing a product that bridged the gap between the board-based system design realm and the new world of FPGA-based system-on-chip (SoC). That announcement has now turned into a real shipping product called Nexar, which provides a complete, end-to-end solution allowing board-based systems designers to rapidly implement SoC designs on FPGA-based boards. Nexar provides both hardware and software development tools and a unified environment for prototyping and realizing the design in actual hardware on an FPGA-based prototyping board.

During beta testing, Altium monitored a number of projects using Nexar to develop hardware/software systems in FPGA. Interestingly, they found that previous FPGA experience was almost a detriment. Nexar’s schematic-based paradigm is very similar to the normal environment of a board-based-system designer, and somewhat foreign to the FPGA veteran who is used to HDL-based design and virtual prototyping using HDL simulation.

Altium’s design process, which they call “LiveDesign,” combines hardware design tools, C and assembler-based embedded software development tools, ready-to-use, pre-synthesized, FPGA-targeted components, virtual instrumentation, and a reconfigurable hardware platform to allow mainstream engineers to interactively design and implement an embedded system inside an FPGA. The system connects to Altium’s “NanoBoard” for real-time rapid prototyping and debug with actual hardware.

In an effort to bring the capability to the masses, Altium has priced the system far below what one might expect, bringing the capabilities within reach of a much larger audience. As such, Nexar will introduce the benefits of programmable logic to a new group of designers, broadening and strengthening FPGA’s reach as a broad-based general-purpose implementation technology.

Xilinx Serial Backplane Programmable Line Card Solutions

The third chapter of our aftermarket accessories roundup really isn’t aftermarket at all. It comes from industry leader Xilinx, and it targets the very market segment that propelled FPGAs to their current level of market acceptance. Using the “if it worked for chips, it should work for boards” philosophy, Xilinx has launched a line of programmable line cards that facilitate rapid development of line card designs using new high-speed serial protocols and taking advantage of the capabilities of Xilinx Virtex II Pro devices.

It’s no secret that the communications industry has been tough for FPGA vendors of late. After the industry crunch and consolidation, designers turned more and more to emerging off-the-shelf ASSP solutions to reduce cost in once FPGA-heavy backplane/line card designs. With the emergence of high-speed serial I/O-based backplane standards, Xilinx saw an opportunity to recapture much of the market by creating ready-to-design line cards complete with power supply, connectors, and FPGAs, and with ample room for user-designed customization. In addition, Xilinx provides reference designs such as crossbar switches and full-mesh fabric building blocks that facilitate rapid development and also act as examples of the capabilities of Xilinx’s development platform.

Xilinx’s platform is PICMG 3.0 compliant, and it includes a 15-channel, single-port, full-mesh fabric interface, an intelligent peripheral manager (IPM) interface, and a base interface shelf management controller (ShMC) port. A Virtex II Pro device acts as a reconfigurable fabric interface and connects to a personality module area where the user-supplied design is attached.

This ATCA development board, combined with the available IP cores and reference designs, is designed to accelerate time-to-market and reduce the expertise required to deploy a new line card design. It also brings the benefits of FPGA back to its roots and re-establishes the validity of programmable-logic-based solutions while raising the bar on rapid deployment with pre-designed IP.

Building and Broadening

The diversity and specificity of these solutions is an indicator of things to come in programmable logic. As the technology penetrates more and more markets, a growing number of solutions vendors will find ways to produce highly-targeted products that serve specific segments very well. This is good news both for those who produce products and solutions in the programmable logic market and for those who use them.

Kevin Morris, FPGA and Programmable Logic Journal

March 9, 2004

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