Lattice Fights Back
Lattice-Fujitsu Partnership Opens New Doors

It is said that adversity strengthens resolve. If this is true, the past couple of years must have filled Lattice Semiconductor with levels of resolve never before seen in the programmable logic industry. Now, Lattice is fighting back. In an exciting announcement this week, Lattice is working to improve its fortune by forging a partnership with semiconductor technology leader Fujitsu Limited for fabrication of next-generation FPGAs.

Lattice, which has always been strong in the PLD/CPLD market, has worked hard to diversify its product line and to break into the larger FPGA market to generate growth beyond what’s available in traditional PLDs. Acceptance of Lattice FPGAs has been slow, however, and recent times have proved difficult with a slow recovery from the downturn amplified by fierce competition, disappointing financial results, and the constant jockeying for position in advanced fabrication lines with their partners Seiko-Epson, UMC, and Chartered Semiconductor.

Lattice announced it is partnering with Fujitsu Limited to produce at least three new families of programmable logic products using Fujitsu’s advanced fabrication capabilities. In addition to investing in Fujitsu’s new leading-edge 300mm fabrication facility which comes online in Spring 2005, Lattice gets immediate benefits from acceleration of new product launches as early as this summer. The agreement should help Lattice in several ways. First, the additional fabrication source provides a much needed hedge against the looming threat of limited production capacity, particularly in the more advanced, smaller geometry, larger wafer processes like 90nm on 300mm wafers. Second, it helps facilitate Lattice’s response to waves of competitive announcements over the past months that it has been thus far unable to answer.

With this announcement, Lattice says they are preparing three new families of FPGAs. The first of these, Lattice SC, is a high-density 90nm line, which presumably will be intended to compete with products such as Altera’s recently announced Stratix II and Xilinx’s Virtex II Pro. The second family is said to be a 130nm product with embedded flash for “instant-on” operation. This family, called LatticeXP, may compete more directly with offerings such as Actel’s ProASIC Plus family, and at the 130nm geometry might also have the cost leverage to compete with Altera’s new MAX II Flash-based FPGA-masquerading-as-CPLD. The final new family is an ultra-low-cost offering called LatticeEC that is based on Fujitsu’s low-k, copper, 130nm process. Lattice EC presumably aims at competitors such as Altera’s Cyclone and Xilinx’s Spartan 3 families.

Lattice’s strategy has historically been somewhat difficult to divine, but this announcement helps to improve strategic clarity. Although details such as the specific combinations of embedded functions in the new families are still undisclosed (and may provide significant additional insight into Lattice’s target market segments), it appears at first glance that Lattice’s plan is a bold, head-on engagement of industry leaders Xilinx and Altera.

Lattice’s announcement says that the new device families anticipate customer requirements for FPGAs over the next three to five years. With the rapidly increasing diversity of FPGA applications, the choice of which features are added to target which new markets will likely be the key determining factors in how much Lattice shares in future FPGA market growth. At this phase in the FPGA business, everyone knows that FPGAs are beginning a push into new market segments. The major players are placing bets on as many promising segments as possible by developing products with feature sets that cater to specific application domains. Each player’s success will be dependent upon how well they choose those segments, and whether they provide the best mix of features to become that group’s preferred provider of programmable logic. Lattice’s agreement with Fujitsu provides a much better opportunity for them to play aggressively in that game.

It is also said that “…the race is not to the fleet, nor the battle to the strong… for season and mischance shall happen to them all.” It is clear that season and mischance are familiar visitors to the programmable logic industry, and Lattice is preparing to capitalize on their next appearance with this triple-espresso-shot added to their arsenal.

Kevin Morris, FPGA and Programmable Logic Journal

March 23, 2004

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