ARTICLE ARCHIVES - FPGA I/O

Two Chips Or One? Avnet Provides a Daughter-card SERDES Solution for Spartan (Bryon Moyer)
(June 24, 2008)

40nm Altera Stratix IV - Bigger and Cooler than we Expected (Kevin Morris)
(May 20, 2008)

High-Speed Serial Comes to the Analog/Digital Divide - Lattice and Linear Technology Collaborate on JESD204 (Bryon Moyer)
(May 13, 2008)

Playing Pin Twister - Taray Attempts to Untangle FPGA Pin Assignment (Bryon Moyer)
(April 29, 2008)

Tools and Transceivers - Dual Xilinx Announcements (Kevin Morris)
(April 1, 2008)

Maximizing Your Millimeters2 - Actel Expands Low Power Line (Kevin Morris)
(March 18, 2008)

Effectively Using Internal Logic Analyzers for Debugging FPGAs by Brian Caslis, Lattice Semiconductor Corporation
(February 12, 2008)

Moving Data with VME by Bryon Moyer, FPGA and Structured ASIC Journal
(February 5, 2008)

BOM Blast - Cutting Costs with FPGAs
(October 30, 2007)

Dialing-in DSP on FPGA - Catapult Customized for Altera
(October 16, 2007)

Flash Flood - Inside FPGAs' Non-volatile Companions
(August 14, 2007)

I/O-topia - The Outer Ring of FPGA Architecture
(July 31, 2007)

FPGAs and Ethernet - Providing Programmability to Pervasive Interconnect Standard
by Navneet Rao, Xilinx, Inc.

(July 10, 2007)

First, Make a Roux - Beyond Basic FPGA Configuration
(June 12, 2007)

FPGA Packaging and Signal Integrity - A Connectivity Perspective
by Navneet Rao, Xilinx, Inc

(May 29, 2007)

Beyond the Go Button - Taking More Control of FPGA Design
(May 15, 2007)

Serial Commodotization - Altera Arria GX
(May 8, 2007)

Fishing for Signal Integrity - SerDes Tuning Basics
(April 24, 2007)

Sampling Some FPGA IP - Samplify Compresses Data and Design Cycles
(April 17, 2007)

ABCs of ESC - FPGAs are A-OK
(April 10, 2007)

Next-Generation 65nm FPGAs - New System Integration Platform Loaded with Connectivity Features
by Navneet Rao, Xilinx, Inc.

(April 10, 2007)

FPGA I/O Design is (also) a PCB Problem by Bruce Riggins, Mentor Graphics Corporation
(February 20, 2007)

Daring DSP - Xilinx’s New SXT
(February 6, 2007)

Pins for Pennies - Xilinx rolls out Spartan-3A
(December 5, 2006)

Sensible SerDes at Sixty Five - Xilinx Launches LXT
(October 17, 2006)

Lattice Breaks the Rules - Slips SerDes into Low-Cost FPGA
(September 19, 2006)

Bit-Based Dynamic Alignment for Multi-Gigabit Parallel I/O
by Ron Warner, Lattice Semiconductor Corp.
(August 29, 2006)

Design Challenges Flow Downstream - by Dave Wiens, Mentor Graphics Corporation
(January 10, 2006)

Express Yourself - The Ins and Outs of PCI Express
(August 16, 2005)

Considerations for High-Bandwidth TCP/IP PowerPC Applications
by Chris Borrelli, Xilinx, Inc.
(July 26, 2005)

Selecting the FPGA that Meets Your Signal Integrity Requirements
by Lalitha Oruganti, Sr. Product Marketing Engineer, FPGA Products,
Altera Corporation
(May 17, 2005)

Breakthrough Bandwidth - SerDes Hits New Heights
(February 22, 2005)

Making the Jump to 10G by Abhijit Athavale and Brian Seemann, Xilinx, Inc.
(February 22, 2005)

FPGA I/O - When to go Serial
by Brock J. LaMeres, Agilent Technologies

(August 3, 2004)

Aurora Lightweight Gigabit Serial Protocol
by Abhijit Athavale, Xilinx, Inc.
(Feb 17, 2004)

Databahn - High Speed Serial I/O for Programmable Logic
(Dec 9, 2003)

Going Serial with your Backplane
by Jock Tomlinson, Lattice Semiconductor
(Dec 9, 2003)

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