Postage-Stamp Linux

“If you have any trouble sounding condescending, find a Unix user to show you how it’s done.” – Scott Adams

There was a time when big operating systems ran on big iron. IBM, Data General, Burroughs, DEC, and other computer makers built big machines with big, blinking lights, and big price tags. They ran grown-up software and they supported multiuser operating systems. If you wanted … Read More → "Postage-Stamp Linux"

Broadcom, Qualcomm, and Call of (Fiduciary) Duty

We’re all in something like our fourth month of sitting and watching the slow motion drama of Broadcom’s attempted acquisition of Qualcomm. It seems everyone has an opinion on whether the merger would be a good thing or bad thing, and debate rages on as the fluid situation repeatedly escalates and then cools. At this point, it’s anybody’s guess whether … Read More → "Broadcom, Qualcomm, and Call of (Fiduciary) Duty"

Policy and Regulations in the IoT World

Watching the tech industry over the last few decades, it’s easy to come to the conclusion that all of the inventions have come solely through the efforts of single-minded entrepreneurs determined to win, even if it means losing in the attempt. While lots of that has happened, this worldview, just like the notion that the Wild West was won solely by rugged individualists with no help from anyone, … Read More → "Policy and Regulations in the IoT World"

DVCon and the Big Data Problem

Design and verification technologies are front and center in this week’s episode of Fish Fry. DVCon General Chair Dennis Brophy joins us with a special sneak peak of the 2018 Design and Verification Conference. Dennis and I chat about how the biggest trends are reflected at DVCON, including machine learning, automotive technologies, and big data analysis. We also discuss the addition of shorter format workshops to … Read More → "DVCon and the Big Data Problem"

It’s Alive!

“The more sand has escaped from the hourglass of our life, the clearer we should see through it.” –  Johann Paul Friedrich Richter

There’s a scene in the old Woody Allen movie, “Sleeper,” where a future time traveler discovers a cave with an ancient, dust-covered VW Beetle parked inside. He cautiously explores the strange artifact before opening the door and hesitantly settling in to the … Read More → "It’s Alive!"

Plunify – The Big FPGA Guns

Eyes scan the optimization options like a master pool player about to run the table against a hapless opponent. Solids and stripes form a map – a complex mathematical model where LUTs and connections melt away and a unique strategy emerges. Quick optimization to get the lay of the land, 7 ball in the side pocket, multiple runs for timing, park the cue ball left to set up for the 5 in … Read More → "Plunify – The Big FPGA Guns"

February 21, 2018
February 20, 2018
February 19, 2018
February 16, 2018
February 15, 2018
February 14, 2018
February 13, 2018
discussion
Posted on Feb 19 at 10:37am by Bryon Moyer
What do you think of these ideas regarding structure for the IoT?
Posted on Feb 15 at 6:55am by Jim Turley
I thought so as well, but VITA itself says that's a retronym: the definition was applied after the fact. It was called VME before they ever came up with a reason why. Max Loesel (one of VME's inventors) once told me it didn't really mean anything.
Posted on Feb 15 at 12:46am by crosland
VME = Versa Module Europe
Posted on Feb 14 at 8:31am by Karl Stevens
@kirvy: Please disregard my previous. My mistake, sorry.
Posted on Feb 14 at 7:54am by Karl Stevens
@kirvy: " But if you consider the possible combinations of settings (there are billions of combinations) versus the runs we do, what we are aiming for is very small in comparison and quite targeted." How do you choose which settings to run?
Posted on Feb 13 at 4:56pm by kirvy
Yep, it is a ML problem. (I am from Plunify) A key component to solving this is the abundance of cheap cloud computing power. We have deployed up to 500 cloud servers a day for just 8 hours, running multiple designs concurrently. At a first glance, it might seem like brute force. ...
Posted on Feb 13 at 3:54pm by Kevin Morris
@Beercandyman - Yep, that is what Plunify is doing. Machine learning that learns to operate the FPGA tools based on a large training set of designs. It's interesting that it is a third party (Plunify) doing this rather than the FPGA companies themselves. Similarly, with both FPGA companies touting how ...
Posted on Feb 13 at 11:20am by Beercandyman
This seems like a task for machine learning. The FPGA manufacturers have 1,000s of designs and the optimum tool settings their experts used to help customers close timing on those designs. Yep a computer could do this job.
Posted on Feb 12 at 8:28am by Bryon Moyer
What do you think of these logic-hiding and -revealing techniques?
Posted on Feb 5 at 6:47am by Bryon Moyer
What do you think of USound's headphones and Chirp's ultrasonic ranging?
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Feb 21, 2018
I recently came across a fascinating piece by Paramal Satyal . He is Nepalese although these days he seems to live in France. His piece is largely autobiographical, but what caught my eye was a bit in the middle where he looks at one of the most ordinary web pages he can find...
Feb 20, 2018
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Jan 19, 2018
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chalk talks
Intel® Aero Ready to Fly Drone In order to develop new applications for drones, we need a flying development kit. Drones are complex systems with incredible versatility, and developing software and hardware can be tricky. In this episode of Chalk Talk, Amelia Dalton chats with Paul Guermonprez of Intel about a new drone development ecosystem. Click here for more information … Read More → "Intel® Aero Ready to Fly Drone"
Moving Between FPGA and ASIC with High-Level Synthesis Writing RTL that works smoothly on both FPGA and ASIC implementations is nearly impossible. But, High-Level Synthesis (HLS) can make technology-independent design a breeze. In this episode of Chalk Talk, Amelia Dalton chats with Stuart Clubb of Mentor’s Catapult team about how to use HLS to accelerate your design flow. Click here for more … Read More → "Moving Between FPGA and ASIC with High-Level Synthesis"
Enabling IoT Applications with Bluetooth 5 and Thread Bluetooth Low Energy is a critical element of just about every IoT device these days. Super low power consumption, wireless connectivity, and robust features make BLE ideal for IoT edge devices. In this episode of Chalk Talk, Amelia Dalton chats with Pratyush Dave from Nordic Semiconductor about how to easily add the very best … Read More → "Enabling IoT Applications with Bluetooth 5 and Thread"
Toshiba Photocouplers: Photorelays Replacing Mechanical Relays   Photorelays outperform mechanical relays in almost every way. But, most designers don’t know about the power, footprint, and reliability advantages they bring to system design. In this episode of Chalk Talk, Amelia Dalton chats with Joseph Tso of Toshiba about how photorelays can improve your next design. Click here for more information about … Read More → "Toshiba Photocouplers: Photorelays Replacing Mechanical Relays"
Security ICs Deliver a Stronger Level of Protection   Physically unclonable functions (PUFs) are like fingerprints for semiconductor devices. And, for security applications, PUFs are an outstanding, secure way to uniquely identify an individual device. In this episode of Chalk Talk, Amelia Dalton chats with Scott Jones from Maxim Integrated about physically unclonable functions, and how you can use them to secure … Read More → "Security ICs Deliver a Stronger Level of Protection"
GaN Power Devices   Wide-band gap transistors bring significant advantages in power system design. By allowing higher voltages, frequencies, and temperatures, they can bring serious performance to your next design. In this episode of Chalk Talk, Amelia Dalton chats with Bob Galli from Panasonic about how to take advantage of GaN power transistors. Click here for more … Read More → "GaN Power Devices"